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74LV32AT14-13

Description
Logic Gates Quad 2-Input 2, 5.5V OR Gates 12mA 4.5V
Categorylogic    logic   
File Size309KB,9 Pages
ManufacturerDiodes Incorporated
Environmental Compliance
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74LV32AT14-13 Overview

Logic Gates Quad 2-Input 2, 5.5V OR Gates 12mA 4.5V

74LV32AT14-13 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerDiodes Incorporated
Parts packaging codeTSSOP
package instructionTSSOP,
Contacts14
Reach Compliance Codecompliant
Factory Lead Time17 weeks
seriesLV/LV-A/LVX/H
JESD-30 codeR-PDSO-G14
JESD-609 codee3
length5 mm
Logic integrated circuit typeOR GATE
Humidity sensitivity level1
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)20 ns
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
width4.4 mm
Base Number Matches1
74LV32A
QUADRUPLE 2-INPUT OR GATES
Description
The 74LV32A provides provides four independent 2-input OR gates
with standard push-pull outputs. The device is designed for operation
with a power supply range of 2.0V to 5.5V.
The inputs are tolerant to 5.5V allowing this device to be used in a
mixed voltage environment. The device is fully specified for partial
power down applications using I
OFF
. The I
OFF
circuitry disables the
output preventing damaging current backflow when the device is
powered down.
The gates perform the Boolean function:
Pin Assignments
Preliminary
NEW PRODUCT
Y
½
A
B
or
Y
½
A
B
Features
Wide Supply Voltage Range from 2.0V to 5.5V
Sinks or sources 12mA at V
CC
= 4.5V
CMOS low power consumption
I
OFF
Supports Partial -Power Down Operation
Inputs or Outputs accept up to 5.5V
Inputs can be driven by 3.3V or 5V allowing for voltage
translation applications.
Schmitt Trigger Action at All Inputs
ESD Protection Tested per JESD 22
Exceeds 200-V Machine Model (A115)
Exceeds 2000-V Human Body Model (A114)
Exceeds 1000-V Charged Device Model (C101)
Applications
General Purpose Logic
Power Down Signal Isolation
Wide array of products such as:
PCs, networking, notebooks, ultrabooks, netbooks
Computer peripherals, hard drives, CD/DVD ROM
TV, DVD, DVR, set top box
Latch-Up Exceeds 100mA per JESD 78, Class I
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free,
"Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl)
and <1000ppm antimony compounds.
Click for Ordering Information
74LV32A
Document number: DS35664 Rev. 1 - 2
1 of 9
www.diodes.com
October 2013
© Diodes Incorporated

74LV32AT14-13 Related Products

74LV32AT14-13 74LV32AS14-13
Description Logic Gates Quad 2-Input 2, 5.5V OR Gates 12mA 4.5V Logic Gates 6 Hex INV 2 to 5.5V Schmitt Trigger 12mA
Is it Rohs certified? conform to conform to
Parts packaging code TSSOP SOIC
package instruction TSSOP, SOP,
Contacts 14 14
Reach Compliance Code compliant compliant
Factory Lead Time 17 weeks 17 weeks
series LV/LV-A/LVX/H LV/LV-A/LVX/H
JESD-30 code R-PDSO-G14 R-PDSO-G14
JESD-609 code e3 e3
length 5 mm 8.635 mm
Logic integrated circuit type OR GATE OR GATE
Humidity sensitivity level 1 1
Number of functions 4 4
Number of entries 2 2
Number of terminals 14 14
Maximum operating temperature 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SOP
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE
propagation delay (tpd) 20 ns 20 ns
Maximum seat height 1.2 mm 1.73 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V
Minimum supply voltage (Vsup) 2 V 2 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE
Terminal surface Matte Tin (Sn) Matte Tin (Sn)
Terminal form GULL WING GULL WING
Terminal pitch 0.65 mm 1.27 mm
Terminal location DUAL DUAL
width 4.4 mm 3.9 mm
Base Number Matches 1 1

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