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AB-557-03-HCLP-S-L-C-T3

Description
Clock Generators & Support Products HCSL Out Clk 1 PCIe LVPECL Output Clk 0
Categorysemiconductor    Analog mixed-signal IC   
File Size4MB,6 Pages
ManufacturerAbracon
Websitehttp://www.abracon.com/index.htm
Environmental Compliance
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AB-557-03-HCLP-S-L-C-T3 Overview

Clock Generators & Support Products HCSL Out Clk 1 PCIe LVPECL Output Clk 0

AB-557-03-HCLP-S-L-C-T3 Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerAbracon
Product CategoryClock Generators & Support Products
RoHSDetails
TypeClock Generators
Maximum Input Frequency460 MHz
Max Output Freq460 MHz
Number of Outputs2 Output
Duty Cycle - Max52 %
Operating Supply Voltage2.25 V to 3.6 V
Operating Supply Current60 mA
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT
Package / CaseTSSOP-16
PackagingReel
Jitter2.5 ps
Moisture SensitiveYes
Factory Pack Quantity3000
Unit Weight0.006102 oz
CRYSTAL-LESS PCI EXPRESS DUAL OUTPUT ULTRA MINIATURE
PURE SILICON
TM
SMD CLOCK GENERATOR
AB-557-03 Series
Moisture Sensitivity Level
MSL 1 – 14 QFN
MSL 3 – 16 TSSOP
Pb
RoHS/RoHS II compliant
3.2 x 2.5 x 0.85 mm (14 Pin QFN)
5.1 x 4.5 x 1.1 mm (16 Pin TSSOP)
FEATURES:
• Meets PCIe Gen1, Gen2, & Gen3 specs.
• High Performance MEMS Technology by Discera
• Available Mixed Output Formats: HCSL, LVPECL, LVDS or LVCMOS
• Wide Temperature Range: -40° to 105° C
• Wide Supply Range: 2.25V to 3.6 V
• Low Power Consumption
• Excellent Shock & Vibration Immunity
APPLICATIONS:
• Solid State Storage
• Storage Area Networks
• Passive Optical Networks
• Ethernet: 1G, 10GBASE-T/KR/LR/SR, and FCoE
• TV and other Consumer Electronics
• Industrial and Medical
• Scanner, Printer
STANDARD SPECIFICATIONS:
Parameters
Frequency
Operating Temperature
Storage Temperature
Overall Freq. Stability
*2
Supply Voltage
Supply Current- Enabled
Supply Current- Disabled
Startup Time
Enable Time
Disable Time
Aging
Output Offset Voltage
Peak to Peak Output Swing
Rise Time
Fall Time
Duty Cycle
Period Jitter
f
0
Minimum
2.3
-20
-55
-100
+2.25
Typical
100
Maximum
460
+70
+150
+100
+3.6
*1
Unite
MHz
°C
°C
ppm
V
mA
mA
ms
ns
ns
V
ppm
V
mV
ps
ps
%
ps
RMS
ps
RMS
ps
p-p
ps
RMS
ps
RMS
ps
RMS
ps
RMS
Notes
See options
See options
R
L
=50Ω,
F
01
=F
02
=100.00MHz
Δf
V
DD
I
DD
I
DD
t
su
t
EN
t
DA
60
23
5
20
5
"1" (VIH≥0.75*Vdd) or Open: Oscillation
"0" (VIL<0.25*Vdd) : Hi Z
-5.0
+5.0
0.725
0.10
750
200
400
200
400
48
52
2.5
0.540
0.832
41.9
8.536
86.0
0.458
0.030
0.165
0.561
1.778
0.147
3.1
3.0
1.0
4.0
7.5
1.0
21
Tri-state Function (Standby/Disable)
V
OH
V
OL
t
r
t
f
SYM
J
PER
R
J
D
J
T
J
J
RMS-CCHF
J
RMS-CCLF
J
RMS-CC
Integrated Phase Noise
(Data Clock Architecture)
J
RMS-DCHF
J
RMS-DCLF
J
RMS-DC
40kΩ pull-up resistor
embedded
First y ear
R
L
=50 Ω
Single-Ended
R
L
=50 Ω, C
L
=2pF
20% to 80%
Differential
F
01
=F
02
=100.00MHz
Integrated Phase Noise
(Common Clock
Architecture)
*1. For frequency other than 100MHz, please contact ABRACON or consider using ASEMDxx series
2. Frequency stability includes frequency variations due to initial tolerance, temp. and power supply voltage
ABRACON IS
ISO9001:2008
CE RTIFIED
PCIe Gen 1.1
T
J
= D
J
+ 14.069 x R
J
(BER 10-12)
PCIe Gen 2.1
1.5 MHz to Nyquist
PCIe Gen 2.1
10kHz to 1.5 MHz
PCIe Gen 3.0
PCIe Gen 2.1
1.5 MHz to Nyquist
PCIe Gen 2.1
10kHz to 1.5 MHz
PCIe Gen 3.0
LLC
2 Faraday, Suite# B
|
Irvine
|
CA 92618
Revised:12.21.15
Ph. 949.546.8000
|
Fax. 949.546.8001
Visit
www.abracon.com
for Terms and Conditions of Sale
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