5SGXEA7N2F45C3 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Programmable logic devices> Programmable logic> 5SGXEA7N2F45C3

5SGXEA7N2F45C3: DescriptionFPGA - Field Programmable Gate Array FPGA - Stratix V GX 2560 LABs 840 IOs; CategoryProgrammable logic devices Programmable logic; File Size812KB，23 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

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5SGXEA7N2F45C3 Overview

FPGA - Field Programmable Gate Array FPGA - Stratix V GX 2560 LABs 840 IOs

5SGXEA7N2F45C3 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Intel
package instruction	BGA, BGA1932,44X44,40
Reach Compliance Code	compliant
ECCN code	3A001.A.7.A
JESD-30 code	S-PBGA-B1932
length	45 mm
Configurable number of logic blocks	23472
Number of entries	840
Number of logical units	622000
Output times	840
Number of terminals	1932
Maximum operating temperature	85 °C
Minimum operating temperature
organize	23472 CLBS
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Encapsulate equivalent code	BGA1932,44X44,40
Package shape	SQUARE
Package form	GRID ARRAY
power supply	0.85,1.5,2.5,2.5/3,1.2/3 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Maximum seat height	3.9 mm
Maximum supply voltage	0.88 V
Minimum supply voltage	0.82 V
Nominal supply voltage	0.85 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
width	45 mm

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2015.10.01

Stratix V Device Overview

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SV51001

Altera’s 28-nm Stratix

V FPGAs include innovations such as an enhanced core architecture, integrated

transceivers up to 28.05 gigabits per second (Gbps), and a unique array of integrated hard intellectual

property (IP) blocks.

With these innovations, Stratix V FPGAs deliver a new class of application-targeted devices optimized for:

• Bandwidth-centric applications and protocols, including PCI Express

(PCIe

) Gen3

• Data-intensive applications for 40G/100G and beyond

• High-performance, high-precision digital signal processing (DSP) applications

Stratix V devices are available in four variants (GT, GX, GS, and E), each targeted for a different set of

applications. For higher volume production, you can prototype with Stratix V FPGAs and use the low-

risk, low-cost path to HardCopy

V ASICs.

Related Information

Stratix V Device Handbook: Known Issues

Lists the planned updates to the

Stratix V Device Handbook

chapters.

Stratix V Family Variants

The Stratix V device family contains the GT, GX, GS, and E variants.

Stratix V GT

devices, with both 28.05-Gbps and 12.5-Gbps transceivers, are optimized for applications

that require ultra-high bandwidth and performance in areas such as 40G/100G/400G optical communica‐

tions systems and optical test systems. 28.05-Gbps and 12.5-Gbps transceivers are also known as GT and

GX channels, respectively.

Stratix V GX

devices offer up to 66 integrated transceivers with 14.1-Gbps data rate capability. These

transceivers also support backplane and optical interface applications. These devices are optimized for

high-performance, high-bandwidth applications such as 40G/100G optical transport, packet processing,

and traffic management found in wireline, military communications, and network test equipment

markets.

Stratix V GS

devices have an abundance of variable precision DSP blocks, supporting up to 3,926 18x18

or 1,963 27x27 multipliers. In addition, Stratix V GS devices offer integrated transceivers with 14.1-Gbps

data rate capability. These transceivers also support backplane and optical interface applications. These

devices are optimized for transceiver-based DSP-centric applications found in wireline, military,

broadcast, and high-performance computing markets.

trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as

trademarks or service marks are the property of their respective holders as described at

www.altera.com/common/legal.html.

Altera warrants performance

of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any

products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,

product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device

specifications before relying on any published information and before placing orders for products or services.

ISO

9001:2008

Registered

www.altera.com

101 Innovation Drive, San Jose, CA 95134

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