nRF24LE1 OTP
Ultra-low Power Wireless System On-Chip
Solution
Product Specification v1.2
Key Features
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nRF24L01+ 2.4 GHz transceiver (250 kbps,
1 Mbps and 2 Mbps air data rates)
Fast microcontroller (8051 compatible)
16 kB program memory (on-chip OTP)
1 kB data memory (on-chip RAM)
1 kB OTP data memory
AES encryption HW accelerator
16-32 bit multiplication/division co-processor
(MDU)
6–12 bit ADC
High flexibility IOs
Serves a set of power modes from ultra low
power to a power efficient active mode
Several versions in various QFN packages:
4
×
4 mm QFN24
5
×
5 mm QFN32
7
×
7 mm QFN48
Applications
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Computer peripherals
Mouse
Keyboard
Remote control
Gaming
Advanced remote controls
Audio/Video
Entertainment centers
Home appliances
Goods tracking and monitoring:
Active RFID
Sensor networks
Security systems
Payment
Alarm
Access control
Health, wellness and sports
Watches
Mini computers
Sensors
Remote control toys
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All rights reserved.
Reproduction in whole or in part is prohibited without the prior written permission of the copyright holder.
September 2010
nRF24LE1 OTP Product Specification
Liability disclaimer
Nordic Semiconductor ASA reserves the right to make changes without further notice to the product to
improve reliability, function or design. Nordic Semiconductor ASA does not assume any liability arising out
of the application or use of any product or circuits described herein.
All application information is advisory and does not form part of the specification.
Limiting values
Stress above one or more of the limiting values may cause permanent damage to the device. These are
stress ratings only and operation of the device at these or at any other conditions above those given in the
specifications are not implied. Exposure to limiting values for extended periods may affect device reliability.
Life support applications
Nordic Semiconductor’s products are not designed for use in life support appliances, devices, or systems
where malfunction of these products can reasonably be expected to result in personal injury. Nordic
Semiconductor ASA customers using or selling these products for use in such applications do so at their
own risk and agree to fully indemnify Nordic Semiconductor ASA for any damages resulting from such
improper use or sale.
Data sheet status
Objective product specification
This product specification contains target specifications for product
development.
Preliminary product specification This product specification contains preliminary data; supplementary
data may be published from Nordic Semiconductor ASA later.
Product specification
This product specification contains final product specifications. Nordic
Semiconductor ASA reserves the right to make changes at any time
without notice in order to improve design and supply the best possible
product.
Contact details
For your nearest dealer, please see
www.nordicsemi.com
Main office:
Otto Nielsens veg 12
7004 Trondheim
Phone: +47 72 89 89 00
Fax: +47 72 89 89 89
www.nordicsemi.com
Revision 1.2
Page 2 of 190
nRF24LE1 OTP Product Specification
Revision History
Date
October 2009
May 2010
Version
1.0
1.1
Description
Product specification
Updated
section 2.1 on page 12, Table 14.
on page 58, Table 15. on page 59, Figure
34. on page 77, Table 34. on page 77, Table
57. on page 106, Table 113. on page 177,
chapter 12 on page 112, chapter 24 on
page 171.
Updated
sections 2.4 on page 16, 6.3.6.1
and
6.3.6.2 on page 75, Table 56. on page
104, Table 57. on page 106, Table 87. on
page 146
,
chapter 24 on page 171
and
chapter 28 on page 182.
September 2010
1.2
RoHS statement
Nordic Semiconductor’s products meet the requirements of Directive 2002/95/EC of the European
Parliament and of the Council on the Restriction of Hazardous Substances (RoHS). Complete hazardous
substance reports as well as material composition reports for all active Nordic products can be found on
our web site
www.nordicsemi.com.
Revision 1.2
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nRF24LE1 OTP Product Specification
Contents
1
Introduction ...............................................................................................
1.1
Prerequisites ........................................................................................
1.2
Writing conventions ..............................................................................
2
Product overview ......................................................................................
2.1
Features ...............................................................................................
2.2
Block diagram ......................................................................................
2.3
Pin assignments ...................................................................................
2.3.1
24-pin 4×4 QFN-package variant ....................................................
2.3.2
32-pin 5×5 QFN-package variant ....................................................
2.3.3
48-pin 7×7 QFN-package variant ....................................................
2.4
Pin functions.........................................................................................
3
RF transceiver ...........................................................................................
3.1
Features ...............................................................................................
3.2
Block diagram ......................................................................................
3.3
Functional description ..........................................................................
3.3.1
Operational Modes ..........................................................................
3.3.1.1
State diagram ...............................................................................
3.3.1.2
Power down mode........................................................................
3.3.1.3
Standby modes ............................................................................
3.3.1.4
RX mode ......................................................................................
3.3.1.5
TX mode.......................................................................................
3.3.1.6
Operational modes configuration .................................................
3.3.1.7
Timing information........................................................................
3.3.2
Air data rate .....................................................................................
3.3.3
RF channel frequency .....................................................................
3.3.4
Received Power Detector measurements .......................................
3.3.5
PA control ........................................................................................
3.3.6
RX/TX control ..................................................................................
3.4
Enhanced ShockBurst™ ......................................................................
3.4.1
Features ..........................................................................................
3.4.2
Enhanced ShockBurst™ overview ..................................................
3.4.3
Enhanced Shockburst™ packet format ...........................................
3.4.3.1
Preamble ......................................................................................
3.4.3.2
Address ........................................................................................
3.4.3.3
Packet Control Field (PCF) ..........................................................
3.4.3.4
Payload ........................................................................................
3.4.3.5
CRC (Cyclic Redundancy Check) ................................................
3.4.4
Automatic packet assembly .............................................................
3.4.5
Automatic packet disassembly ........................................................
3.4.6
Automatic packet transaction handling ............................................
3.4.6.1
Auto Acknowledgement................................................................
3.4.6.2
Auto Retransmission (ART)..........................................................
3.4.7
Enhanced ShockBurst™ flowcharts ................................................
11
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12
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14
15
15
15
16
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17
17
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19
20
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26
27
28
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31
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nRF24LE1 OTP Product Specification
3.4.7.1
3.4.7.2
3.4.8
3.4.9
3.4.10
3.4.10.1
3.4.10.2
3.4.10.3
3.4.10.4
3.4.10.5
3.4.10.6
PTX operation .............................................................................. 31
PRX operation .............................................................................. 33
MultiCeiver™ ................................................................................... 34
Enhanced ShockBurst™ timing ....................................................... 36
Enhanced ShockBurst™ transaction diagram ................................. 39
Single transaction with ACK packet and interrupts ...................... 40
Single transaction with a lost packet ............................................ 40
Single transaction with a lost ACK packet.................................... 41
Single transaction with ACK payload packet................................ 41
Single transaction with ACK payload packet and lost packet....... 42
Two transactions with ACK payload packet and the first ACK
packet lost ................................................................................... .42
3.4.10.7
Two transactions where max retransmissions is reached............ 43
3.4.11
Compatibility with ShockBurst™...................................................... 43
3.4.11.1
ShockBurst™ packet format......................................................... 43
3.5
Data and control interface .................................................................... 44
3.5.1
SFR registers................................................................................... 44
3.5.2
SPI operation ................................................................................... 45
3.5.2.1
SPI commands ............................................................................. 45
3.5.3
Data FIFO ........................................................................................ 47
3.5.4
Interrupt ........................................................................................... 48
3.6
Register map ........................................................................................ 49
3.6.1
Register map table .......................................................................... 49
4
MCU ............................................................................................................ 55
4.1
Block diagram ...................................................................................... 56
4.2
Features ............................................................................................... 56
4.3
Functional description .......................................................................... 57
4.3.1
Arithmetic Logic Unit (ALU) ............................................................. 57
4.3.2
Instruction set summary .................................................................. 57
4.3.3
Opcode map .................................................................................... 61
5
Memory and I/O organization ................................................................... 63
5.1
PDATA memory addressing................................................................. 64
5.2
MCU Special Function Registers ......................................................... 64
5.2.1
Accumulator - ACC .......................................................................... 64
5.2.2
B Register – B ................................................................................. 64
5.2.3
Program Status Word Register - PSW ............................................ 65
5.2.4
Stack Pointer – SP .......................................................................... 65
5.2.5
Data Pointer – DPH, DPL ................................................................ 65
5.2.6
Data Pointer 1 – DPH1, DPL1 ......................................................... 66
5.2.7
Data Pointer Select Register – DPS ................................................ 66
5.2.8
PCON register ................................................................................. 66
5.2.9
Special Function Register Map........................................................ 67
5.2.10
Special Function Registers reset values.......................................... 68
6
OTP memory.............................................................................................. 71
6.1
Features ............................................................................................... 71
6.2
Block diagram ...................................................................................... 71
Revision 1.2
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