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8T49N366A-999ASGI8

Description
Clock Generators & Support Products Femto NG Clock Generator
Categorysemiconductor    Analog mixed-signal IC   
File Size489KB,36 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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8T49N366A-999ASGI8 Overview

Clock Generators & Support Products Femto NG Clock Generator

8T49N366A-999ASGI8 Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerIDT (Integrated Device Technology)
Product CategoryClock Generators & Support Products
RoHSDetails
TypeClock Translators
Maximum Input Frequency710 MHz
Max Output Freq1300 MHz
Number of Outputs3 Output
Duty Cycle - Max60 %
Operating Supply Voltage2.5 V, 3.3 V
Operating Supply Current880 mA
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT
Package / CaseCABGA-80
PackagingReel
Height1.4 mm
Length10 mm
Output TypeLVPECL, LVDS
Width10 mm
Jitter40 ps
Moisture SensitiveYes
Factory Pack Quantity1500
FemtoClock
®
NG Triple Universal
Frequency Translator
TM
IDT8T49N366I
DATA SHEET
General Description
The IDT8T49N366I is a triple PLL with FemtoClock
®
NG technology.
The IDT8T49N366I integrates low phase noise Frequency
Translation / Synthesis and Jitter attenuation. It includes alarm and
monitoring functions suitable for networking and communications
applications. The device has three fully independent PLLs. Each PLL
is able to generate any output frequency in the 0.98MHz - 312.5MHz
range and most output frequencies in the 312.5MHz - 1,300MHz
range (see Table 3 for details). A wide range of input reference
clocks may be used as the source for the output frequency.
Each PLL of IDT8T49N366I has three operating modes to support a
very broad spectrum of applications:
1) Frequency Synthesizer
Features
Fourth generation FemtoClock
®
NG technology
Three fully independent PLLs
Universal Frequency Translator
TM
/Frequency Synthesizer and
Jitter attenuator
Outputs are programmable as LVPECL or LVDS
Programmable output frequency: 0.98MHz up to 1,300MHz
Two differential inputs per PLL support the following input types:
LVPECL, LVDS, LVHSTL, HCSL
Input frequency range: 8kHz - 710MHz (Low-Bandwidth mode)
Input frequency range: 16MHz - 710MHz (High-Bandwidth mode)
REFCLK frequency range: 16MHz - 40MHz
Input clock monitor on each PLL will smoothly switch between
redundant input references
Factory-set register configuration for power-up default state
Synthesizes output frequencies from an external reference
clock REFCLK.
Fractional feedback division is used, so there are no
requirements for any specific input reference clock frequency to
produce the desired output frequency with a high degree of
accuracy.
Applications: PCI Express, Computing, General Purpose
Translates any input clock in the 16MHz - 710MHz frequency
range into any supported output frequency.
This mode has a high PLL loop bandwidth in order to track input
reference changes, such as Spread-Spectrum Clock
modulation.
Applications: Networking & Communications.
Translates any input clock in the 8kHz -710MHz frequency
range into any supported output frequency.
This mode supports PLL loop bandwidths in the 10Hz - 580Hz
range and makes use of an external REFCLK to provide
significant jitter attenuation.
2) High-Bandwidth Frequency Translator
Power-up default configuration
Configuration customized via One-Time Programmable ROM
Settings may be overwritten after power-up via I
2
C
I
2
C Serial interface for register programming
RMS phase jitter at 161.1328125MHz, using 40MHz REFCLK
(12kHz - 20MHz): 465fs (typical), Low Bandwidth Mode (FracN)
RMS phase jitter at 400MHz, using 40MHz REFCLK
(12kHz - 20MHz): 333fs (typical), Synthesizer Mode (Integer FB)
Full 2.5V ±5% supply mode
-40°C to 85°C ambient operating temperature
10mm x 10mm CABGA package
Lead-free (RoHS 6) packaging
3) Low-Bandwidth Frequency Translator
Each PLL provides factory-programmed default power-up
configuration burned into One-Time Programmable (OTP) memory.
The configuration is specified by customer and are programmed by
IDT during the final test phase from an on-hand stock of blank
devices.
To implement other configurations, these power-up default settings
can be overwritten after power-up using the I
2
C interface and the
device can be completely reconfigured.
IDT8T49N366AASGI REVISION A JUNE 28, 2013
1
©2013 Integrated Device Technology, Inc.

8T49N366A-999ASGI8 Related Products

8T49N366A-999ASGI8 8T49N366A-000ASGI
Description Clock Generators & Support Products Femto NG Clock Generator Clock Generators & Support Products Femto NG Clock Generator
Product Attribute Attribute Value Attribute Value
Manufacturer IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Product Category Clock Generators & Support Products Clock Generators & Support Products
RoHS Details Details
Type Clock Translators Clock Translators
Maximum Input Frequency 710 MHz 710 MHz
Max Output Freq 1300 MHz 1300 MHz
Number of Outputs 3 Output 3 Output
Duty Cycle - Max 60 % 60 %
Operating Supply Voltage 2.5 V, 3.3 V 2.5 V, 3.3 V
Operating Supply Current 880 mA 880 mA
Minimum Operating Temperature - 40 C - 40 C
Maximum Operating Temperature + 85 C + 85 C
Mounting Style SMD/SMT SMD/SMT
Package / Case CABGA-80 CABGA-80
Packaging Reel Tray
Height 1.4 mm 1.4 mm
Length 10 mm 10 mm
Output Type LVPECL, LVDS LVPECL, LVDS
Width 10 mm 10 mm
Jitter 40 ps 40 ps
Moisture Sensitive Yes Yes
Factory Pack Quantity 1500 184
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