MC3403, MC3303
Single Supply Quad
Operational Amplifiers
The MC3403 is a low cost, quad operational amplifier with true
differential inputs. The device has electrical characteristics similar to
the popular MC1741C. However, the MC3403 has several distinct
advantages over standard operational amplifier types in single supply
applications. The quad amplifier can operate at supply voltages as low
as 3.0 V or as high as 36 V with quiescent currents about one third of
those associated with the MC1741C (on a per amplifier basis). The
common mode input range includes the negative supply, thereby
eliminating the necessity for external biasing components in many
applications. The output voltage range also includes the negative
power supply voltage.
Features
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MARKING
DIAGRAMS
14
14
1
SOIC−14
D SUFFIX
CASE 751A
1
MC3x03DG
AWLYWW
•
•
•
•
•
•
•
•
•
•
•
•
Short Circuit Protected Outputs
Class AB Output Stage for Minimal Crossover Distortion
True Differential Input Stage
Single Supply Operation: 3.0 V to 36 V
Split Supply Operation:
±1.5
V to
±18
V
Low Input Bias Currents: 500 nA Max
Four Amplifiers Per Package
Internally Compensated
Similar Performance to Popular MC1741C
Industry Standard Pin−outs
ESD Diodes Added for Increased Ruggedness
Pb−Free Packages are Available
14
PDIP−14
P SUFFIX
CASE 646
1
MC3x03P
AWLYYWWG
14
1
x
= 3 or 4
A
= Assembly Location
WL = Wafer Lot
YY, Y = Year
WW = Work Week
G
= Pb−Free Package
PIN CONNECTIONS
Single Supply
3.0 V to 36 V
1
2
3
4
V
EE
, GND
V
EE
V
CC
V
CC
1
2
3
4
1.5 V to 18 V
Inputs 2
6
Out 2 7
(Top View)
V
CC
4
5
+
2
-
3 +
-
11
10
Inputs 3
9
8
Out 3
V
EE
/GND
1.5 V to 18 V
Inputs 1
3
Split Supplies
Out 1 1
2
-
+
-
+
14 Out 4
13
Inputs 4
12
1
4
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
©
Semiconductor Components Industries, LLC, 2012
January, 2012
−
Rev. 11
1
Publication Order Number:
MC3403/D
MC3403, MC3303
ORDERING INFORMATION
Device
MC3303D
MC3303DG
MC3303DR2
MC3303DR2G
MC3303P
MC3303PG
MC3403D
MC3403DG
MC3403DR2
MC3403DR2G
MC3403P
MC3403PG
Package
SOIC−14
SOIC−14
(Pb−Free)
SOIC−14
SOIC−14
(Pb−Free)
PDIP−14
PDIP−14
(Pb−Free)
SOIC−14
SOIC−14
(Pb−Free)
SOIC−14
SOIC−14
(Pb−Free)
PDIP−14
PDIP−14
(Pb−Free)
25 Units / Rail
2500 Tape & Reel
55 Units / Rail
25 Units / Rail
2500 Tape & Reel
55 Units / Rail
Shipping
†
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
MAXIMUM RATINGS
Rating
Power Supply Voltages
Single Supply
Split Supplies
Input Differential Voltage Range (Note 1)
Input Common Mode Voltage Range (Notes 1 and 2)
Storage Temperature Range
Operating Ambient Temperature Range
MC3303
MC3403
Symbol
V
CC
V
CC
, V
EE
V
IDR
V
ICR
T
stg
T
A
Value
36
±18
±36
±18
−55
to +125
−40
to +85
0 to +70
150
Unit
Vdc
Vdc
Vdc
°C
°C
Junction Temperature
T
J
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Split power supplies.
2. For supply voltages less than
±18
V, the absolute maximum input voltage is equal to the supply voltage.
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2
MC3403, MC3303
ELECTRICAL CHARACTERISTICS
(V
CC
= +15 V, V
EE
=
−15
V for MC3403; V
CC
= +14 V, V
EE
= GND for MC3303 T
A
= 25°C, unless otherwise noted.)
MC3403
Characteristic
Input Offset Voltage
T
A
= T
high
to T
low
(Note 3)
Input Offset Current
T
A
= T
high
to T
low
Large Signal Open Loop Voltage Gain
V
O
=
±10
V, R
L
= 2.0 kW
T
A
= T
high
to T
low
Input Bias Current
T
A
= T
high
to T
low
Output Impedance f = 20 Hz
Input Impedance f = 20 Hz
Output Voltage Range
R
L
= 10 kW
R
L
= 2.0 kW
R
L
= 2.0 kW, T
A
= T
high
to T
low
Input Common Mode Voltage Range
Common Mode Rejection R
S
≤
10 kW
Power Supply Current (V
O
= 0) R
L
=
∞
Individual Output Short−Circuit Current (Note 4)
Positive Power Supply Rejection Ratio
Negative Power Supply Rejection Ratio
Average Temperature Coefficient of Input
Offset Current
T
A
= T
high
to T
low
Average Temperature Coefficient of Input
Offset Voltage
T
A
= T
high
to T
low
Power Bandwidth
A
V
= 1, R
L
= 10 kW, V
O
= 20 V(p−p), THD = 5%
Small−Signal Bandwidth
A
V
= 1, R
L
= 10 kW, V
O
= 50 mV
Slew Rate A
V
= 1, V
i
=
−10
V to +10 V
Rise Time A
V
= 1, R
L
= 10 kW, V
O
= 50 mV
Fall Time A
V
= 1, R
L
= 10 kW, V
O
= 50 mV
Overshoot A
V
= 1, R
L
= 10 kW, V
O
= 50 mV
Phase Margin A
V
= 1, R
L
= 2.0 kW, V
O
= 200 pF
Crossover Distortion
(V
in
= 30 mVpp,V
out
= 2.0 Vpp, f = 10 kHz)
Symbol
V
IO
I
IO
A
VOL
Min
−
−
−
−
20
15
−
−
−
0.3
±12
±10
±10
+13 V
−V
EE
70
−
±10
−
−
−
Typ
2.0
−
30
−
200
−
−200
−
75
1.0
±13.5
±13
−
+13 V
−V
EE
90
2.8
±20
30
30
50
Max
10
12
50
200
−
−
−500
−800
−
−
−
−
−
−
−
7.0
±45
150
150
−
Min
−
−
−
−
20
15
−
−
−
0.3
12
10
10
+12 V
−V
EE
70
−
±10
−
−
−
MC3303
Typ
2.0
−
30
−
200
−
−200
−
75
1.0
12.5
12
−
+12.5 V
−V
EE
90
2.8
±30
30
30
50
Max
8.0
10
75
250
−
−
−500
−1000
−
−
−
−
−
−
−
7.0
±45
150
150
−
Unit
mV
nA
V/mV
I
IB
z
o
z
i
V
O
nA
W
MW
V
V
ICR
CMR
I
CC
, I
EE
I
SC
PSRR+
PSRR−
DI
IO
/DT
V
dB
mA
mA
mV/V
mV/V
pA/°C
DV
IO
/DT
−
10
−
−
10
−
mV/°C
BWp
BW
SR
t
TLH
t
TLH
os
fm
−
−
−
−
−
−
−
−
−
9.0
1.0
0.6
0.35
0.35
20
60
1.0
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
9.0
1.0
0.6
0.35
0.35
20
60
1.0
−
−
−
−
−
−
−
−
kHz
MHz
V/ms
ms
ms
%
°
%
3. MC3303: T
low
=
−40°C,
T
high
= +85°C, MC3403: T
low
= 0°C, T
high
= +70°C
4. Not to exceed maximum package power dissipation.
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3
MC3403, MC3303
ELECTRICAL CHARACTERISTICS
(V
CC
= 5.0 V, V
EE
= GND, T
A
= 25°C, unless otherwise noted.)
MC3403
Characteristic
Input Offset Voltage
Input Offset Current
Input Bias Current
Large Signal Open Loop Voltage Gain
R
L
= 2.0 kW
Power Supply Rejection Ratio
Output Voltage Range (Note 5)
R
L
= 10 kW, V
CC
= 5.0 V
R
L
= 10 kW, 5.0
≤
V
CC
≤
30 V
Power Supply Current
Channel Separation
f = 1.0 kHz to 20 kHz
(Input Referenced)
Symbol
V
IO
I
IO
I
IB
A
VOL
PSRR
V
OR
Min
−
−
−
10
−
3.3
V
CC
−2.0
−
−
Typ
2.0
30
−200
200
−
3.5
V
CC
−1.7
2.5
−120
Max
10
50
−500
−
150
−
−
7.0
−
Min
−
−
−
10
−
3.3
V
CC
−2.0
−
−
MC3303
Typ
−
−
−
200
−
3.5
V
CC
−1.7
2.5
−120
Max
10
75
−500
−
150
−
−
7.0
−
Unit
mV
nA
nA
V/mV
mV/V
V
pp
I
CC
CS
mA
dB
5. Output will swing to ground with a 10 kW pull down resistor.
Output
Q19
Q20
Q18
Q17
Q16
Bias Circuitry
Common to Four
Amplifiers
V
CC
Q27
Q23
5.0 pF
31k
+
Q22
Inputs
-
Q2
Q3
Q4
Q21
Q25
Q5
60 k
Q6
Q7
Q8
Q10
Q24
Q1
2.0 k
Q9
37 k
40 k
Q28
Q15
Q13
Q11
25
Q12
Q29
Q30
2.4 k
V
EE
(GND)
Figure 1. Representative Schematic Diagram
(1/4 of Circuit Shown)
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4
MC3403, MC3303
CIRCUIT DESCRIPTION
stage performs not only the first stage gain function but also
performs the level shifting and Transconductance reduction
functions. By reducing the Transconductance, a smaller
compensation capacitor (only 5.0 pF) can be employed, thus
saving chip area. The Transconductance reduction is
accomplished by splitting the collectors of Q24 and Q22.
Another feature of this input stage is that the input common
mode range can include the negative supply or ground, in
single supply operation, without saturating either the input
devices or the differential to single−ended converter. The
second stage consists of a standard current source load
amplifier stage.
The output stage is unique because it allows the output to
swing to ground in single supply operation and yet does not
exhibit any crossover distortion in split supply operation.
This is possible because Class AB operation is utilized.
Each amplifier is biased from an internal voltage regulator
which has a low temperature coefficient, thus giving each
amplifier good temperature characteristics as well as
excellent power supply rejection.
120
A
V
= 100
A VOL , LARGE SIGNAL
OPEN LOOP VOLTAGE GAIN (dB)
0.5 V/DIV
100
80
60
40
20
0
-20
1.0
10
100
1.0 k
10 k
f, FREQUENCY (Hz)
100 k
1.0 M
V
CC
= 15 V
V
EE
= -15 V
T
A
= 25°C
5.0 V/DIV
20
ms/DIV
Figure 2. Inverter Pulse Response
The MC3403/3303 is made using four internally
compensated, two−stage operational amplifiers. The first
stage of each consists of differential input device Q24 and
Q22 with input buffer transistors Q25 and Q21 and the
differential to single ended converter Q3 and Q4. The first
50 mV/DIV
*Note Class A B output stage produces distortion less sinewave.
50
ms/DIV
Figure 3. Sine Wave Response
Figure 4. Open Loop Frequency Response
30
VO, OUTPUT VOLTAGE (Vpp )
25
-
20
15
10
5.0
T
A
= 25°C
0
-5.0
1.0 k
10 k
100 k
f, FREQUENCY (Hz)
1.0 M
+
-15 V
V
O
10 k
+15 V
VO, OUTPUT VOLTAGE RANGE (V pp)
30
T
A
= 25°C
20
10
0
0
2.0
4.0
6.0 8.0 10
12
14
16
18
V
CC
AND (V
EE
), POWER SUPPLY VOLTAGES (V)
20
Figure 5. Power Bandwidth
Figure 6. Output Swing versus Supply Voltage
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Embedded System
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