8545AG-02LF datasheet, PDF - EEWORLD Datasheet

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8545AG-02LF: DescriptionClock Drivers & Distribution 4 LVDS OUT BUFFER; Categorylogic logic; File Size690KB，14 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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8545AG-02LF Overview

Clock Drivers & Distribution 4 LVDS OUT BUFFER

8545AG-02LF Parametric

Parameter Name	Attribute value
Brand Name	Integrated Device Technology
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	TSSOP
package instruction	TSSOP, TSSOP20,.25
Contacts	20
Manufacturer packaging code	PGG20
Reach Compliance Code	compliant
ECCN code	EAR99
series	8545
Input adjustment	MUX
JESD-30 code	R-PDSO-G20
JESD-609 code	e3
length	6.5 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
Humidity sensitivity level	1
Number of functions	1
Number of inverted outputs
Number of terminals	20
Actual output times	4
Maximum operating temperature	70 °C
Minimum operating temperature
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP20,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Prop。Delay @ Nom-Sup	1.45 ns
propagation delay (tpd)	1.45 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.06 ns
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	4.4 mm
Base Number Matches	1

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LOW SKEW, 1-TO-4 LVCMOS/LVTTL-TO-LVDS

FANOUT BUFFER

ICS8545-02

Description

The ICS8545-02 is a low skew, high performance

1-to-4 LVCMOS/LVTTL-to-LVDS Clock Fanout

HiPerClockS™

Buffer and a member of the HiPerClockS™ family of

High Performance Clock Solutions from IDT.

Utilizing Low Voltage Differential Signaling (LVDS)

the ICS8545-02 provides a low power, low noise, solution for

distributing clock signals over controlled impedances of 100Ω. The

ICS8545-02 accepts an LVCMOS/LVTTL input level and translates

it to 3.3V LVDS output levels.

Features

•

Four differential LVDS output pairs

Two LVCMOS/LVTTL clock inputs to support redundant

or selectable frequency fanout applications

Maximum output frequency: 350MHz

Translates LVCMOS/LVTTL input signals to LVDS levels

Output skew: 60ps (maximum)

Part-to-part skew: 450ps (maximum)

Propagation delay: 1.45ns (maximum)

Additive phase jitter, RMS: 0.14ps (typical)

Full 3.3Vsupply mode

0°C to 70°C ambient operating temperature

Available in both standard (RoHS 5) and lead-free (RoHS 6)

packages

ICS

Guaranteed output and part-to-part skew characteristics make the

ICS8545-02 ideal for those applications demanding well defined

performance and repeatability.

Block Diagram

CLK_EN

Pullup

CLK1

Pulldown

CLK2

Pulldown

CLK_SEL

Pulldown

nQ0

nQ1

nQ2

nQ3

Pullup

Pin Assignment

GND

CLK_EN

CLK_SEL

CLK1

CLK2

GND

nQ0

nQ1

nQ2

GND

nQ3

ICS8545-02

20-Lead TSSOP

6.5mm x 4.4mm x 0.925

package body

G Package

Top View

IDT™ / ICS™

LVDS FANOUT BUFFER

ICS8545AG-02 REV. A

March 3,

2009

8545AG-02LF Related Products

	8545AG-02LF	8545AGI-02LF	8545AGI-02LFT	8545AG-02LFT
Description	Clock Drivers & Distribution 4 LVDS OUT BUFFER	Clock Drivers & Distribution 4 LVDS OUT BUFFER	Clock Drivers & Distribution 4 LVDS OUT BUFFER	Clock Drivers & Distribution 4 LVDS OUT BUFFER
Brand Name	Integrated Device Technology	Integrated Device Technology	Integrated Device Technology	Integrated Device Technology
Is it lead-free?	Lead free	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to	conform to
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)
Parts packaging code	TSSOP	TSSOP	TSSOP	TSSOP
package instruction	TSSOP, TSSOP20,.25	TSSOP-20	TSSOP, TSSOP20,.25	TSSOP, TSSOP20,.25
Contacts	20	20	20	20
Manufacturer packaging code	PGG20	PGG20	PGG20	PGG20
Reach Compliance Code	compliant	compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99
series	8545	8545	8545	8545
Input adjustment	MUX	MUX	MUX	MUX
JESD-30 code	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20
JESD-609 code	e3	e3	e3	e3
length	6.5 mm	6.5 mm	6.5 mm	6.5 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER	LOW SKEW CLOCK DRIVER
Humidity sensitivity level	1	1	1	1
Number of functions	1	1	1	1
Number of terminals	20	20	20	20
Actual output times	4	4	4	4
Maximum operating temperature	70 °C	85 °C	85 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	TSSOP	TSSOP	TSSOP
Encapsulate equivalent code	TSSOP20,.25	TSSOP20,.25	TSSOP20,.25	TSSOP20,.25
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	260	260	260
power supply	3.3 V	3.3 V	3.3 V	3.3 V
Prop。Delay @ Nom-Sup	1.45 ns	1.45 ns	1.45 ns	1.45 ns
propagation delay (tpd)	1.45 ns	1.45 ns	1.45 ns	1.45 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Same Edge Skew-Max（tskwd）	0.06 ns	0.06 ns	0.06 ns	0.06 ns
Maximum seat height	1.2 mm	1.2 mm	1.2 mm	1.2 mm
Maximum supply voltage (Vsup)	3.465 V	3.465 V	3.465 V	3.465 V
Minimum supply voltage (Vsup)	3.135 V	3.135 V	3.135 V	3.135 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	YES	YES	YES	YES
Temperature level	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed	Matte Tin (Sn) - annealed
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm	0.65 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	4.4 mm	4.4 mm	4.4 mm	4.4 mm
Base Number Matches	1	-	1	1

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