AT88SC0104C
Atmel CryptoMemory, 1-Kbit
SUMMARY DATASHEET
Features
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One of a family of nine devices with user memories from 1-Kbit to 256-Kbit
1-Kbit (128-byte) EEPROM user memory
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Four 32 byte (256 bit) zones
Self-timed write cycle
Single byte or 16-byte page write mode
Programmable access rights for each zone
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2-Kbit configuration zone
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37-byte OTP area for user-defined codes
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160-byte area for user-defined keys and passwords
High security features
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64-bit mutual authentication protocol (under license of ELVA)
Encrypted checksum
Stream encryption
Four key sets for authentication and encryption
Eight sets of two 24-bit passwords
Anti-tearing function
Voltage and frequency monitor
ISO 7816 Class A (5V) or Class B (3V) operation
®
ISO 7816-3 asynchronous T = 0 protocol (Gemplus patent) *
Multiple zones, key sets and passwords for multi-application use
Synchronous 2-wire serial interface for faster device initialization *
Programmable 8-byte answer-to-reset register
ISO 7816-2 compliant modules
Low voltage operation: 2.7V to 5.5V
Secure nonvolatile storage for sensitive system or user information
2-wire serial interface
1.0MHz compatibility for fast operation
Standard 8-lead plastic packages, green compliant (exceeds RoHS)
Same pinout as 2-wire Serial EEPROMs
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Smart card features
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Embedded application features
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High reliability
This is a summary document.
The complete document is
available on the Atmel website
at www.atmel.com.
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Endurance: 100,000 cycles
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Data retention: 10 years
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ESD protection: 4,000V min
* Note: Modules available with either T=0 / 2-wire modes or 2-wire mode only
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Atmel-2021MS-CryptoMem-AT88SC0104C-Datasheet-Summary_122013
Table 1.
Pad
VCC
GND
SCL/CLK
SDA/IO
RST
Pin Assignment
Description
Supply Voltage
Ground
Serial Clock Input
Serial Data Input/Output
Reset Input
ISO Module
C1
C5
C3
C7
C2
TWI Module
C1
C5
C3
C7
NC
Standard Package Pin
8
4
6
5
NC
Pin Configuration
ISO Smart Card Module
V
CC
=C1
RST=C2
SCL/CLK=C3
NC=C4
C5=GND
C6=NC
C7=SDA/IO
C8=NC
8-lead SOIC, PDIP
NC
NC
NC
GND
1
2
3
4
8
7
6
5
V
CC
NC
SCL
SDA
TWI Smart Card Module
V
CC
=C1
NC=C2
SCL/CLK=C3
NC=C4
C5=GND
C6=NC
C7=SDA/IO
C8=NC
1.
Description
The Atmel AT88SC0104C member of the Atmel CryptoMemory family is a high-performance secure memory providing 1-
Kbit of user memory with advanced security and cryptographic features built in. The user memory is divided into four 32-byte
zones, each of which may be individually set with different security access rights or effectively combined together to provide
space for one to four data files.
®
®
1.1
Smart Card Applications
The AT88SC0104C provides high security, low cost, and ease of implementation without the need for a microprocessor
operating system. The embedded cryptographic engine provides for dynamic and symmetric mutual authentication between
the device and host, as well as performing stream encryption for all data and passwords exchanged between the device and
host. Up to four unique key sets may be used for these operations. The AT88SC0104C offers the ability to communicate with
virtually any smart card reader using the asynchronous T = 0 protocol (Gemplus Patent) defined in ISO 7816-3.
1.2
Embedded Applications
Through dynamic and symmetric mutual authentication, data encryption, and the use of encrypted checksums, the
AT88SC0104C provides a secure place for storage of sensitive information within a system. With its tamper detection circuits,
this information remains safe even under attack. A 2-wire serial interface running at 1.0MHz is used for fast and efficient
communications with up to 15 devices that may be individually addressed. The AT88SC0104C is available in industry standard
8-lead packages with the same familiar pinout as 2-wire Serial EEPROMs.
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AT88SC0104C [SUMMARY DATASHEET]
Atmel-2021MS-CryptoMem-AT88SC0104C-Datasheet-Summary_122013
Figure 1-1. Block Diagram
Authentication,
Encryption and
Certification Unit
V
CC
GND
Power
Management
Random
Generator
Synchronous
Interface
Data Transfer
SCL/CLK
SDA/IO
RST
Asynchronous
ISO Interface
Password
Verification
EEPROM
Reset Block
Answer to Reset
2.
2.1
Pin Descriptions
Supply Voltage (V
CC
)
The V
CC
input is a 2.7V to 5.5V positive voltage supplied by the host.
2.2
Clock (SCL/CLK)
In the asynchronous T = 0 protocol, the SCL/CLK input is used to provide the device with a carrier frequency
f.
The nominal
length of one bit emitted on I/O is defined as an “elementary time unit” (ETU) and is equal to 372/
f.
When the synchronous
protocol is used, the SCL/CLK input is used to positive edge clock data into the device and negative edge clock data out of the
device.
2.3
Reset (RST)
The AT88SC0104C provides an ISO 7816-3 compliant asynchronous answer to reset sequence. When the reset sequence is
activated, the device will output the data programmed into the 64-bit answer-to-reset register. An internal pull-up on the RST
input pad allows the device to be used in synchronous mode without bonding RST. The AT88SC0104C does not support the
synchronous answer-to-reset sequence.
2.4
Serial Data (SDA/IO)
The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wired with any number of other
open drain or open collector devices. An external pull-up resistor should be connected between SDA and V
CC
. The value of
this resistor and the system capacitance loading the SDA bus will determine the rise time of SDA. This rise time will determine
the maximum frequency during read operations. Low value pull-up resistors will allow higher frequency operations while
drawing higher average power. SDA/IO information applies to both asynchronous and synchronous protocols.
When the synchronous protocol is used, the SCL/CLK input is used to positive edge clock data into the device and negative
edge clock data out of the device.
Atmel-2021MS-CryptoMem-AT88SC0104C-Datasheet-Summary_122013
AT88SC0104C [SUMMARY DATASHEET]
3
3.
Absolute Maximum Ratings*
Operating Temperature .................. −40°C to +85°C
Storage Temperature .................. −65°C to + 150°C
Voltage on Any Pin
with Respect to Ground .............− 0.7 to V
CC
+0.7V
Maximum Operating Voltage ........................... 6.0V
DC Output Current ........................................ 5.0mA
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at these or any other condition
beyond those indicated in the operational sections of
this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of
time may affect device reliability.
Table 3-1.
Symbol
V
CC
I
CC
I
CC
I
CC
I
CC
I
SB
V
IL
V
IL
V
IL
(1)
(1)
(1)
(1)(2)
(1)(2)
(2)
DC Characteristics
Parameter
Supply Voltage
Supply Current (V
CC
= 5.5V)
Supply Current (V
CC
= 5.5V)
Supply Current (V
CC
= 5.5V)
Supply Current (V
CC
= 5.5V)
Standby Current (V
CC
= 5.5V)
SDA/IO Input Low Threshold
SCL/CLK Input Low Threshold
RST Input Low Threshold
SDA/IO Input High Threshold
SCL/CLK Input High
Threshold
RST Input High Threshold
SDA/IO Input Low Current
SCL/CLK Input Low Current
RST Input Low Current
SDA/IO Input High Current
SCL/CLK Input High Current
RST Input High Current
SDA/IO Output High Voltage
SDA/IO Output Low Voltage
SDA/IO Output High Current
0 < V
IL
< V
CC
x 0.15
0 < V
IL
< V
CC
x 0.15
0 < V
IL
< V
CC
x 0.15
V
CC
x 0.7 < V
IH
< V
CC
V
CC
x 0.7 < V
IH
< V
CC
V
CC
x 0.7 < V
IH
< V
CC
20K ohm external pull-up
I
OL
= 1mA
V
OH
V
CC
x 0.7
0
Async Read at 3.57MHz
Async Write at 3.57MHz
Synch Read at 1MHz
Synch Write at 1MHz
V
IN
= V
CC
or GND
0
0
0
V
CC
x 0.7
V
CC
x 0.7
V
CC
x 0.7
Test Condition
Min
2.7
Typ
Max
5.5
5
5
5
5
100
V
CC
x 0.2
V
CC
x 0.2
V
CC
x 0.2
V
CC
V
CC
V
CC
15
15
50
20
100
150
V
CC
V
CC
x 0.15
20
Units
V
mA
mA
mA
mA
mA
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
V
V
µA
Applicable over recommended operating range from V
CC
= +2.7 to 5.5V, T
AC
= -40°C to +85°C (unless
otherwise noted)
V
IH
V
IH
V
IH
I
IL
I
IL
I
IL
I
IH
I
IH
I
IH
(1)(2)
V
OH
V
OL
I
OH
Notes:
1.
2.
V
IL
min and V
IH
max are reference only and are not tested
To prevent latch up conditions from occurring during power up of the AT88SCxxxxC, V
CC
must be turned on
before applying V
IH
. For powering down, V
IH
must be removed before turning V
CC
off
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AT88SC0104C [SUMMARY DATASHEET]
Atmel-2021MS-CryptoMem-AT88SC0104C-Datasheet-Summary_122013
Table 3-2.
AC Characteristics
Applicable over recommended operating range from V
CC
= +2.7 to 5.5V,
T
AC
= -40°C to +85°C, CL = 30pF (unless
otherwise noted)
Symbol
f
CLK
f
CLK
f
CLK
t
R
t
F
t
R
t
F
t
AA
t
HD.STA
t
SU.STA
t
HD.DAT
t
SU.DAT
t
SU.STO
t
DH
t
WR
t
WR
Parameter
Async Clock Frequency (V
CC
Range: +4.5 - 5.5V)
Async Clock Frequency (V
CC
Range: +2.7 - 3.3V)
Synch Clock Frequency
Clock Duty cycle
Rise Time - I/O, RST
Fall Time - I/O, RST
Rise Time - CLK
Fall Time - CLK
Clock Low to Data Out Valid
Start Hold Time
Start Set-up Time
Data In Hold Time
Data In Set-up Time
Stop Set-up Time
Data Out Hold Time
Write Cycle Time (at 25°C)
Write Cycle Time (-40° to +85°C)
200
200
10
100
200
20
5
7
Min
1
1
0
40
Max
5
4
1
60
1
1
9% x period
9% x period
35
Units
MHZ
MHZ
MHZ
%
µS
µS
µS
µS
nS
nS
nS
nS
nS
nS
nS
mS
mS
4.
Device Operation for Synchronous Protocols
Clock and Data Transitions:
The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time
periods (see Figure 4-3 on page 7). Data changes during SCL high periods will indicate a start or stop condition as defined
below.
Start Condition:
A high-to-low transition of SDA with SCL high is a start condition which must precede any other command (see Figure 4-4 on
page 7).
Stop Condition:
A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop command will place the
EEPROM in a standby power mode (see Figure 4-4 on page 7).
Acknowledge:
All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero to
acknowledge that it has received each word. This happens during the ninth clock cycle (see Figure 4-5 on page 7).
Memory Reset:
After an interruption in protocol, power loss or system reset, any 2-wire part can be reset by following these steps:
1.
2.
3.
Clock up to nine cycles
Look for SDA high in each cycle while SCL is high
Create a start condition
Atmel-2021MS-CryptoMem-AT88SC0104C-Datasheet-Summary_122013
AT88SC0104C [SUMMARY DATASHEET]
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