74LVT244BD datasheet, PDF - EEWORLD Datasheet

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74LVT244BD: DescriptionBuffers & Line Drivers OCTAL BUF/LINE DRVR; Categorylogic logic; File Size84KB，16 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74LVT244BD Overview

Buffers & Line Drivers OCTAL BUF/LINE DRVR

74LVT244BD Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	SOIC
package instruction	7.50 MM, PLASTIC, MS-013, SOT163-1, SOP-20
Contacts	20
Reach Compliance Code	unknown
Control type	ENABLE LOW
series	LVT
JESD-30 code	R-PDSO-G20
JESD-609 code	e4
length	12.8 mm
Logic integrated circuit type	BUS DRIVER
MaximumI(ol)	0.064 A
Humidity sensitivity level	1
Number of digits	4
Number of functions	2
Number of ports	2
Number of terminals	20
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP20,.4
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
power supply	3.3 V
Prop。Delay @ Nom-Sup	3.5 ns
propagation delay (tpd)	3.8 ns
Certification status	Not Qualified
Maximum seat height	2.65 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	BICMOS
Temperature level	INDUSTRIAL
Terminal surface	NICKEL PALLADIUM GOLD
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	7.5 mm
Base Number Matches	1

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74LVT244B; 74LVTH244B

3.3 V octal buffer/line driver; 3-state

Rev. 03 — 3 March 2006

Product data sheet

1. General description

The 74LVT244B; 74LVTH244B is a high-performance BiCMOS product designed for V

operation at 3.3 V.

This device is an octal buffer that is ideal for driving bus lines. The device features two

output enable inputs (1OE and 2OE), each controlling four of the 3-state outputs.

2. Features

Octal bus interface

3-state buffers

Speed upgrade of 74LVT244A

Output capability: +64 mA and

−32

TTL input and output switching levels

Input and output interface capability to systems at 5 V supply

Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs

Power-up 3-state

Live insertion and extraction permitted

No bus current loading when output is tied to 5 V bus

Latch-up protection:

JESD78: exceeds 500 mA

ESD protection:

HBM EIA/JESD22-A114-C exceeds 2000 V

MM EIA/JESD22-A115-A 200 V

3. Quick reference data

Table 1.

Quick reference data

GND = 0 V; T

amb

= 25

Symbol Parameter

PLH

PHL

LOW-to-HIGH propagation

delay nAn to nYn

Conditions

= 50 pF; V

= 3.3 V

Min

Typ

1.9

2.0

Max

Unit

HIGH-to-LOW propagation C

= 50 pF; V

= 3.3 V

delay nAn to nYn

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