CS4385
114 dB, 192 kHz 8-Channel D/A Converter
Features
Advanced Multi-bit Delta Sigma Architecture
24-bit Conversion
Automatic Detection of Sample Rates up to
192 kHz
114 dB Dynamic Range
-100 dB THD+N
Direct Stream Digital Mode
– Non-Decimating Volume Control
– On-Chip 50 kHz Filter
– Matched PCM and DSD Analog Output
Levels
Compatible with Industry-Standard Time
Division Multiplexed (TDM) Serial Interface
Selectable Digital Filters
Volume Control with 1/2-dB Step Size and Soft
Ramp
Low Clock-Jitter Sensitivity
+5 V Analog Supply, +2.5 V Digital Supply
Separate 1.8 to 5 V Logic Supplies for the
Control and Serial Ports
Control Port Supply = 1.8 V to 5 V
Description
The CS4385 is a complete 8-channel digital-to-analog
system. This D/A system includes digital de-emphasis,
half-dB step size volume control, ATAPI channel mix-
ing, selectable fast and slow digital interpolation filters
followed by an oversampled, multi-bit delta sigma mod-
ulator which includes mismatch-shaping technology
that eliminates distortion due to capacitor mismatch.
Following this stage is a multi-element switched capac-
itor stage and low-pass filter with differential analog
outputs.
The CS4385 also has a proprietary DSD processor
which allows for volume control and 50 kHz on-chip fil-
tering without an intermediate decimation stage. It also
offers an optional path for direct DSD conversion by di-
rectly using the multi-element switched capacitor array.
The CS4385 is available in a 48-pin LQFP package in
both Commercial (-40°C to +85°C) and Automotive
(-40°C to +105°C) grades. The CDB4385 Customer
Demonstration board is also available for device evalu-
ation and implementation suggestions. Please see
“Ordering Information” on page 54
for complete details.
The CS4385 accepts PCM data at sample rates from
4 kHz to 216 kHz, DSD audio data, and delivers excel-
lent sound quality. These features are ideal for multi-
channel audio systems, including SACD players, A/V
receivers, digital TV’s, mixing consoles, effects proces-
sors, sound cards, and automotive audio systems.
Digital Supply = 2.5 V
Analog Supply = 5 V
Level Translator
Hardware Mode or
I
2
C/SPI Software Mode
Control Data
Register/Hardware
Configuration
Internal Voltage
Reference
Reset
Serial Audio Port
Supply = 1.8 V to 5 V
Serial Interface
TDM Serial
Audio Input
DSD Audio
Input
Level Translator
PCM Serial
Audio Input
8
Volume
Controls
Digital
Filters
Multi-bit
ΔΣ
Modulators
Switch-Cap
DAC and
Analog Filters
8
8
Eight Channels
of Differential
Outputs
DSD Processor
-Volume control
-50 kHz filter
External Mute
Control
2
Mute Signals
http://www.cirrus.com
Copyright
©
Cirrus Logic, Inc. 2008
(All Rights Reserved)
FEB
'08
DS671F2
CS4385
TABLE OF CONTENTS
1. PIN DESCRIPTION
...................................................................................................................... 6
2. CHARACTERISTICS AND SPECIFICATIONS ...................................................................................... 8
RECOMMENDED OPERATING CONDITIONS ..................................................................................... 8
ABSOLUTE MAXIMUM RATINGS ......................................................................................................... 8
DAC ANALOG CHARACTERISTICS - COMMERCIAL (-CQZ) ............................................................. 9
DAC ANALOG CHARACTERISTICS - AUTOMOTIVE (-DQZ) ............................................................ 10
POWER AND THERMAL CHARACTERISTICS .................................................................................. 11
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE ...................................... 12
COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE (CONTINUED) .............. 13
DSD COMBINED DIGITAL & ON-CHIP ANALOG FILTER RESPONSE ............................................. 13
DIGITAL CHARACTERISTICS ............................................................................................................. 14
SWITCHING CHARACTERISTICS - PCM ........................................................................................... 15
SWITCHING CHARACTERISTICS - DSD ........................................................................................... 16
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT .............................................. 17
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT ............................................. 18
3. TYPICAL CONNECTION DIAGRAM ................................................................................................... 19
4. APPLICATIONS ................................................................................................................................... 21
4.1 Master Clock ................................................................................................................................... 21
4.2 Mode Select .................................................................................................................................... 22
4.3 Digital Interface Formats ................................................................................................................ 23
4.3.1 OLM #1 .................................................................................................................................. 24
4.3.2 OLM #2 .................................................................................................................................. 24
4.3.3 OLM #3 .................................................................................................................................. 25
4.3.4 OLM #4 .................................................................................................................................. 25
4.3.5 TDM ....................................................................................................................................... 26
4.4 Oversampling Modes ...................................................................................................................... 26
4.5 Interpolation Filter ........................................................................................................................... 26
4.6 De-Emphasis .................................................................................................................................. 27
4.7 ATAPI Specification ........................................................................................................................ 27
4.8 Direct Stream Digital (DSD) Mode .................................................................................................. 28
4.9 Grounding and Power Supply Arrangements ................................................................................. 29
4.9.1 Capacitor Placement ............................................................................................................. 29
4.10 Analog Output and Filtering .......................................................................................................... 29
4.11 The MUTEC Outputs .................................................................................................................... 30
4.12 Recommended Power-Up Sequence ........................................................................................... 31
4.12.1 Hardware Mode ................................................................................................................... 31
4.12.2 Software Mode .................................................................................................................... 32
4.13 Recommended Procedure for Switching Operational Modes ....................................................... 32
4.14 Control Port Interface ................................................................................................................... 32
4.14.1 MAP Auto Increment ........................................................................................................... 32
4.14.2 I²C Mode .............................................................................................................................. 32
4.14.2.1 I²C Write ................................................................................................................... 33
4.14.2.2 I²C Read .................................................................................................................. 33
4.14.3 SPI Mode ............................................................................................................................. 34
4.14.3.1 SPI Write .................................................................................................................. 34
4.15 Memory Address Pointer (MAP) .................................................................................................. 34
4.15.1 INCR (Auto Map Increment Enable) .................................................................................... 34
4.15.2 MAP4-0 (Memory Address Pointer) .................................................................................... 34
5. REGISTER QUICK REFERENCE ....................................................................................................... 35
6. REGISTER DESCRIPTION .................................................................................................................. 37
6.1 Chip Revision (address 01h) ......................................................................................................... 37
6.1.1 Part Number ID (PART) [Read Only] .................................................................................... 37
2
DS671F2
CS4385
6.2 Mode Control 1 (address 02h) ........................................................................................................ 37
6.2.1 Control Port Enable (CPEN) .................................................................................................. 37
6.2.2 Freeze Controls (FREEZE) ................................................................................................... 37
6.2.3 PCM/DSD Selection (DSD/PCM) .......................................................................................... 38
6.2.4 DAC Pair Disable (DACx_DIS) .............................................................................................. 38
6.2.5 Power Down (PDN) ............................................................................................................... 38
6.3 PCM Control (address 03h) ............................................................................................................ 38
6.3.1 Digital Interface Format (DIF) ................................................................................................ 38
6.3.2 Functional Mode (FM) ........................................................................................................... 39
6.4 DSD Control (address 04h) ............................................................................................................ 39
6.4.1 DSD Mode Digital Interface Format (DSD_DIF) .................................................................... 39
6.4.2 Direct DSD Conversion (DIR_DSD) ...................................................................................... 40
6.4.3 Static DSD Detect (STATIC_DSD) ........................................................................................ 40
6.4.4 Invalid DSD Detect (INVALID_DSD) ..................................................................................... 40
6.4.5 DSD Phase Modulation Mode Select (DSD_PM_MODE) ..................................................... 40
6.4.6 DSD Phase Modulation Mode Enable (DSD_PM_EN) ......................................................... 40
6.5 Filter Control (address 05h) ............................................................................................................ 41
6.5.1 Interpolation Filter Select (FILT_SEL) ................................................................................... 41
6.6 Invert Control (address 06h) ........................................................................................................... 41
6.6.1 Invert Signal Polarity (Inv_xx) ................................................................................................ 41
6.7 Group Control (address 07h) .......................................................................................................... 41
6.7.1 Mutec Pin Control (MUTEC) .................................................................................................. 41
6.7.2 Channel A Volume = Channel B Volume (Px_A=B) .............................................................. 42
6.7.3 Single Volume Control (SNGLVOL) ...................................................................................... 42
6.8 Ramp and Mute (address 08h) ....................................................................................................... 42
6.8.1 Soft Ramp and Zero Cross CONTROL (SZC) ...................................................................... 42
6.8.2 Soft Volume Ramp-Up after Error (RMP_UP) ....................................................................... 43
6.8.3 Soft Ramp-Down before Filter Mode Change (RMP_DN) ..................................................... 43
6.8.4 PCM Auto-Mute (PAMUTE) .................................................................................................. 43
6.8.5 DSD Auto-Mute (DAMUTE) ................................................................................................... 44
6.8.6 MUTE Polarity and DETECT (MUTEP1:0) ............................................................................ 44
6.9 Mute Control (address 09h) ............................................................................................................ 44
6.9.1 Mute (MUTE_xx) ................................................................................................................... 44
6.10 Mixing Control (address 0Ah, 0Dh, 10h, 13h) .............................................................................. 45
6.10.1 De-Emphasis Control (PX_DEM1:0) ................................................................................... 45
6.10.2 ATAPI Channel Mixing and Muting (ATAPI) ........................................................................ 45
6.11 Volume Control (address 0Bh, 0Ch, 0Eh, 0Fh, 11h, 12h, 14h, 15h) ............................................ 46
6.11.1 Digital Volume Control (xx_VOL7:0) ................................................................................... 46
6.12 PCM Clock Mode (address 16h) .................................................................................................. 47
6.12.1 Master Clock DIVIDE by 2 ENABLE (MCLKDIV) ................................................................ 47
7. FILTER PLOTS ..................................................................................................................................... 48
8. PARAMETER DEFINITIONS ................................................................................................................ 52
9. PACKAGE DIMENSIONS ................................................................................................................... 53
10. ORDERING INFORMATION .............................................................................................................. 54
11. REFERENCES .................................................................................................................................... 54
12. REVISION HISTORY ......................................................................................................................... 54
DS671F2
3
CS4385
LIST OF FIGURES
Figure 1.Serial Audio Interface Timing ...................................................................................................... 15
Figure 2.TDM Serial Audio Interface Timing ............................................................................................. 15
Figure 3.Direct Stream Digital - Serial Audio Input Timing ........................................................................ 16
Figure 4.Direct Stream Digital - Serial Audio Input Timing for Phase Modulation Mode ........................... 16
Figure 5.Control Port Timing - I²C Format ................................................................................................. 17
Figure 6.Control Port Timing - SPI Format ................................................................................................ 18
Figure 7.Typical Connection Diagram, Software Mode ............................................................................. 19
Figure 8.Typical Connection Diagram, Hardware ..................................................................................... 20
Figure 9.Format 0 - Left-Justified up to 24-bit Data .................................................................................. 23
Figure 10.Format 1 - I²S up to 24-bit Data ................................................................................................ 23
Figure 11.Format 2 - Right-Justified 16-bit Data ....................................................................................... 23
Figure 12.Format 3 - Right-Justified 24-bit Data ....................................................................................... 23
Figure 13.Format 4 - Right-Justified 20-bit Data ....................................................................................... 23
Figure 14.Format 5 - Right-Justified 18-bit Data ....................................................................................... 24
Figure 15.Format 8 - One-Line Mode 1 ..................................................................................................... 24
Figure 16.Format 9 - One-Line Mode 2 ..................................................................................................... 24
Figure 17.Format 10 - One-Line Mode 3 ................................................................................................... 25
Figure 18.Format 11 - One Line Mode 4 ................................................................................................... 25
Figure 19.Format 12 - TDM Mode ............................................................................................................. 26
Figure 20.De-Emphasis Curve .................................................................................................................. 27
Figure 21.ATAPI Block Diagram (x = channel pair 1, 2, 3, or 4) ............................................................... 27
Figure 22.DSD Phase Modulation Mode Diagram .................................................................................... 28
Figure 23.Full-Scale Output ...................................................................................................................... 29
Figure 24.Recommended Output Filter ..................................................................................................... 30
Figure 25.Recommended Mute Circuitry .................................................................................................. 31
Figure 26.Control Port Timing, I²C Mode .................................................................................................. 33
Figure 27.Control Port Timing, SPI Mode ................................................................................................. 34
Figure 28.Single-Speed (fast) Stopband Rejection ................................................................................... 48
Figure 29.Single-Speed (fast) Transition Band ......................................................................................... 48
Figure 30.Single-Speed (fast) Transition Band (detail) ............................................................................. 48
Figure 31.Single-Speed (fast) Passband Ripple ....................................................................................... 48
Figure 32.Single-Speed (slow) Stopband Rejection ................................................................................. 48
Figure 33.Single-Speed (slow) Transition Band ........................................................................................ 48
Figure 34.Single-Speed (slow) Transition Band (detail) ............................................................................ 49
Figure 35.Single-Speed (slow) Passband Ripple ...................................................................................... 49
Figure 36.Double-Speed (fast) Stopband Rejection ................................................................................. 49
Figure 37.Double-Speed (fast) Transition Band ........................................................................................ 49
Figure 38.Double-Speed (fast) Transition Band (detail) ............................................................................ 49
Figure 39.Double-Speed (fast) Passband Ripple ...................................................................................... 49
Figure 40.Double-Speed (slow) Stopband Rejection ................................................................................ 50
Figure 41.Double-Speed (slow) Transition Band ...................................................................................... 50
Figure 42.Double-Speed (slow) Transition Band (detail) .......................................................................... 50
Figure 43.Double-Speed (slow) Passband Ripple .................................................................................... 50
Figure 44.Quad-Speed (fast) Stopband Rejection .................................................................................... 50
Figure 45.Quad-Speed (fast) Transition Band .......................................................................................... 50
Figure 46.Quad-Speed (fast) Transition Band (detail) .............................................................................. 51
Figure 47.Quad-Speed (fast) Passband Ripple ........................................................................................ 51
Figure 48.Quad-Speed (slow) Stopband Rejection ................................................................................... 51
Figure 49.Quad-Speed (slow) Transition Band ......................................................................................... 51
Figure 50.Quad-Speed (slow) Transition Band (detail) ............................................................................. 51
Figure 51.Quad-Speed (slow) Passband Ripple ....................................................................................... 51
4
DS671F2
CS4385
LIST OF TABLES
Table 1. Single-Speed Mode Standard Frequencies ................................................................................ 21
Table 2. Double-Speed Mode Standard Frequencies ............................................................................... 21
Table 3. Quad-Speed Mode Standard Frequencies ................................................................................. 21
Table 4. PCM Digital Interface Format, Hardware Mode Options ............................................................. 22
Table 5. Mode Selection, Hardware Mode Options .................................................................................. 22
Table 6. Direct Stream Digital (DSD), Hardware Mode Options ............................................................... 22
Table 7. Digital Interface Formats - PCM Mode ........................................................................................ 39
Table 8. Digital Interface Formats - DSD Mode ........................................................................................ 39
Table 9. ATAPI Decode Table .................................................................................................................. 45
Table 10. Example Digital Volume Settings .............................................................................................. 46
DS671F2
5
京公网安备 11010802033920号
EEWORLD
