TC55W800XB7,8
TENTATIVE
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
524,288-WORD BY 16-BIT FULL CMOS STATIC RAM
DESCRIPTION
The TC55W800XB is a 8,388,608-bit static random access memory (SRAM) organized as 524,288 words by 16 bits.
Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 2.3 to 3.3 V
power supply. Advanced circuit technology provides both high speed and low power at an operating current of 3
mA/MHz and a minimum cycle time of 70 ns. It is automatically placed in low-power mode at 0.5
µA
standby
current (at V
DD
=
3 V, Ta
=
25°C, maximum) when chip enable ( CE1 ) is asserted high or (CE2) is asserted low.
There are three control inputs. CE1 and CE2 are used to select the device and for data retention control, and
output enable ( OE ) provides fast memory access. Data byte control pin ( LB , UB ) provides lower and upper byte
access. This device is well suited to various microprocessor system applications where high speed, low power and
battery backup are required. And, with a guaranteed operating extreme temperature range of
−40°
to 85°C, the
TC55W800XB can be used in environments exhibiting extreme temperature conditions. The TC55W800XB is
available in a plastic 48-ball BGA.
FEATURES
•
•
•
•
•
•
•
Low-power dissipation
Operating: 9.9 mW/MHz (typical)
Single power supply voltage of 2.3 to 3.3 V
Power down features using CE1 and CE2
Data retention supply voltage of 1.5 to 3.3 V
Direct TTL compatibility for all inputs and outputs
Wide operating temperature range of
−40°
to 85°C
Standby Current (maximum):
3.3 V
3.0 V
10
µA
5
µA
•
Access Times (maximum at V
DD
=
2.7 to 3.3 V):
TC55W800XB
7
Access Time
CE1
Access Time
8
85 ns
85 ns
85 ns
45 ns
70 ns
70 ns
70 ns
35 ns
CE2 Access Time
OE
Access Time
•
Package:
P-TFBGA48-0811-0.75AZ (Weight: 0.21 g typ)
PIN ASSIGNMENT
(TOP VIEW)
48 PIN BGA
1
A
B
LB
I/O9
2
OE
UB
PIN NAMES
3
A0
A3
A5
A17
NC
A14
A12
A9
4
A1
A4
A6
A7
A16
A15
A13
A10
5
A2
CE1
6
CE2
I/O1
I/O3
V
DD
V
SS
I/O7
I/O8
NC
A0~A18
CE1
, CE2
Address Inputs
Chip Enable
Read/Write Control
Output Enable
Data Byte Control
Data Inputs/Outputs
Power
Ground
No Connection
R/W
OE
C I/O10 I/O11
D
E
V
SS
V
DD
I/O12
I/O13
I/O2
I/O4
I/O5
I/O6
R/W
A11
LB ,
UB
I/O1~I/O16
V
DD
GND
NC
F I/O15 I/O14
G I/O16
H
A18
NC
A8
2001-10-03
1/12
TC55W800XB7,8
MAXIMUM RATINGS
SYMBOL
V
DD
V
IN
V
I/O
P
D
T
solder
T
stg
T
opr
Power Supply Voltage
Input Voltage
Input/Output Voltage
Power Dissipation
Soldering Temperature (10s)
Storage Temperature
Operating Temperature
RATING
VALUE
−0.3~4.2
−0.3*~4.2
−0.5~V
DD
+
0.5
0.6
260
−55~125
−40~85
UNIT
V
V
V
W
°C
°C
°C
*:
−2.0
V when measured at a pulse width of 25ns
DC RECOMMENDED OPERATING CONDITIONS (
Ta
= −
40° to 85°C
)
SYMBOL
V
DD
V
IH
V
IL
V
DH
PARAMETER
Power Supply Voltage
Input High Voltage
Input Low Voltage
Data Retention Supply Voltage
V
DD
=
2.3 V~3.3 V
V
DD
=
2.7 V~3.3 V
MIN
2.3
2.0
2.2
−0.3*
1.5
V
DD
×
0.22
3.3
V
V
TYP
MAX
3.3
V
DD
+
0.3
UNIT
V
V
*:
−2.0
V when measured at a pulse width of 25ns
2001-10-03
3/12
TC55W800XB7,8
DC CHARACTERISTICS
(Ta
= −
40° to 85°C, V
DD
=
2.3 to 3.3 V)
SYMBOL
I
IL
I
OH
I
OL
I
LO
PARAMETER
Input Leakage
Current
Output High Current
Output Low Current
Output Leakage
Current
V
IN
=
0 V~V
DD
V
OH
=
V
DD
−
0.5 V
V
OL
=
0.4 V
CE1
=
V
IH
or CE2
=
V
IL
or LB and
UB
=
V
IH
or R/W
=
V
IL
or
OE
=
V
IH
, V
OUT
=
0 V~V
DD
CE1
=
V
IL
and CE2
=
V
IH
and
LB and
UB
=
V
IL
and R/W
=
V
IH
and
I
OUT
=
0 mA and Other Input
=
V
IH
/V
IL
TEST CONDITION
MIN
−0.5
2.1
min
t
cycle
1
µs
min
t
cycle
1
µs
TYP
0.05
MAX
±1.0
±1.0
50
UNIT
µA
mA
mA
µA
l
DDO1
Operating Current
l
DDO2
mA
10
45
mA
5
2
1
10
0.5
1
5
µA
mA
CE1
=
0.2 V and CE2
=
V
DD
−
0.2 V and
LB and
UB
=
0.2 V,
R/W
=
V
DD
−
0.2 V and I
OUT
=
0 mA,
Other Input
=
V
DD
−
0.2 V/0.2 V
I
DDS1
CE1
=
V
IH
or CE2
=
V
IL
or LB and
UB
=
V
IH
CE1
=
V
DD
−
0.2 V
or CE2
=
0.2 V
or LB and
UB
=
V
DD
−
0.2 V,
V
DD
=
1.5 V~3.3 V
V
DD
=
3.0 V
±
10%
V
DD
=
3.0 V
Ta
=
25°C
Ta
= −40~85°C
Ta
=
25°C
Ta
= −40~40°C
Ta
= −40~85°C
I
DDS2
(Note)
Standby Current
Note
½
In standby mode with
CE1
≥
V
DD
−
0.2 V, these limits are assured for the condition CE2
≥
V
DD
−
0.2 V or CE2
≤
0.2 V.
½
In standby mode with LB and
UB
≥
V
DD
−
0.2 V, these limits are assured for the condition
CE1
≥
V
DD
−
0.2 V or
CE1
≤
0.2 V and CE2
≥
V
DD
−
0.2 V or CE2
≤
0.2 V.
CAPACITANCE
(Ta
=
25°C, f
=
1 MHz)
SYMBOL
C
IN
C
OUT
Note:
PARAMETER
Input Capacitance
Output Capacitance
V
IN
=
GND
V
OUT
=
GND
TEST CONDITION
MAX
10
10
UNIT
pF
pF
This parameter is periodically sampled and is not 100% tested.
2001-10-03
4/12
TC55W800XB7,8
(Ta
= −
40° to 85°C, V
DD
=
2.7 to 3.3 V)
READ CYCLE
TC55W800XB
SYMBOL
PARAMETER
MIN
t
RC
t
ACC
t
CO1
t
CO2
t
OE
t
BA
t
COE
t
OEE
t
BE
t
OD
t
ODO
t
BD
t
OH
Read Cycle Time
Address Access Time
Chip Enable(
CE1
) Access Time
Chip Enable(CE2) Access Time
Output Enable Access Time
Data Byte Control Access Time
Chip Enable Low to Output Active
Output Enable Low to Output Active
Data Byte Control Low to Output Active
Chip Enable High to Output High-Z
Output Enable High to Output High-Z
Data Byte Control High to Output High-Z
Output Data Hold Time
70
5
0
0
10
7
MAX
70
70
70
35
70
30
30
30
MIN
85
5
0
0
10
8
MAX
85
85
85
45
85
35
35
35
ns
UNIT
AC CHARACTERISTICS AND OPERATING CONDITIONS
WRITE CYCLE
TC55W800XB
SYMBOL
PARAMETER
MIN
t
WC
t
WP
t
CW
t
BW
t
AS
t
WR
t
ODW
t
OEW
t
DS
t
DH
Write Cycle Time
Write Pulse Width
Chip Enable to End of Write
Data Byte Control to End of Write
Address Setup Time
Write Recovery Time
R/W Low to Output High-Z
R/W High to Output Active
Data Setup Time
Data Hold Time
70
50
60
60
0
0
0
30
0
7
MAX
30
MIN
85
55
70
70
0
0
0
35
0
8
MAX
35
ns
UNIT
AC TEST CONDITIONS
PARAMETER
Output load
Input pulse level
Timing measurements
Reference level
t
R
, t
F
TEST CONDITION
30 pF
+
1 TTL Gate
0.4 V, 2.4 V
V
DD
×
0.5
V
DD
×
0.5
5 ns
2001-10-03
5/12
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