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87158AGT

Description
Clock Driver, 87158 Series, 6 True Output(s), 0 Inverted Output(s), PDSO48, 6.10 X 12.50 MM, 0.92 MM HEIGHT, MO-153, TSSOP-48
Categorylogic    logic   
File Size356KB,17 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

87158AGT Overview

Clock Driver, 87158 Series, 6 True Output(s), 0 Inverted Output(s), PDSO48, 6.10 X 12.50 MM, 0.92 MM HEIGHT, MO-153, TSSOP-48

87158AGT Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeTSSOP
package instruction6.10 X 12.50 MM, 0.92 MM HEIGHT, MO-153, TSSOP-48
Contacts48
Reach Compliance Codenot_compliant
ECCN codeEAR99
Is SamacsysN
series87158
Input adjustmentDIFFERENTIAL
JESD-30 codeR-PDSO-G48
JESD-609 codee0
length12.5 mm
Logic integrated circuit typeCLOCK DRIVER
Maximum Frequency@Nom-Sup600000000 Hz
Humidity sensitivity level1
Number of functions1
Number of inverted outputs
Number of terminals48
Actual output times6
Maximum operating temperature85 °C
Minimum operating temperature
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP48,.3,20
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)225
power supply3.3 V
Maximum supply current (ICC)65 mA
propagation delay (tpd)4 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.1 ns
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelOTHER
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperature20
width6.1 mm
Base Number Matches1
ICS87158
1-
TO
-6, LVPECL-
TO
-HCSL/LVCMOS
÷1, ÷2, ÷4 C
LOCK
G
ENERATOR
G
ENERAL
D
ESCRIPTION
The ICS87158 is a high performance 1-to-6 LVPECL-to-
HCSL/LVCMOS ClockGenerator. The ICS87158 has one
differential input (which can accept LVDS, LVPECL, LVHSTL,
SSTL, HCSL), six differential HCSL output pairs and two
complementary LVCMOS/LVTTLoutputs. The six HCSL
output pairs can be individually configured for divide-by-1, 2,
and 4 or high impedance by use of select pins. The two
complementary LVCMOS/LVTTL outputs can be configured
for divide by 2, divide by 4, high impedance, or driven low for
low power operation.
The primary use of the ICS87158 is in Intel
®
E8870 chipsets
that use Intel
®
Pentium 4 processors. The ICS87158 converts
the differential clock from the main system clock into HCSL
clocks used by Intel
®
Pentium 4 processors. However, the
ICS87158 is a highly flexible, general purpose device that
operates up to 600MHz and can be used in any situation where
Differential-to-HCSL translation is required.
F
EATURES
Six HCSL outputs
Two LVCMOS/LVTTL outputs
One Differential LVPECL clock input pair
PCLK, nPCLK supports the following input types:
LVDS, LVPECL, LVHSTL, SSTL, HCSL
Maximum output frequency: 600MHz (maximum)
Output skew: 100ps (maximum)
Propagation delay: 4ns (maximum)
3.3V operating supply
0°C to 85°C ambient operating temperature
Available in both standard and lead-free RoHS compliant
packages
Industrial temperature information available upon request
B
LOCK
D
IAGRAM
MULT_0
MULT_1
IREF
P
IN
A
SSIGNMENT
GND
V
DD
V
DD
_R
PCLK
nPCLK
GND_R
V
DD
_M
MREF
nMREF
GND_M
V
DD
GND
V
DD
_L
V
DD
GND_L
SEL_T
MULT_0
MULT_1
V
DD
_L
GND_L
SEL_A
SEL_B
SEL_U
PWR_DWN#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
V
DD
GND_H
V
DD
_H
HOST_P1
HOST_N1
GND_H
HOST_P2
HOST_N2
V
DD
_H
HOST_P3
HOST_N3
GND_H
HOST_P4
HOST_N4
V
DD
_H
HOST_P5
HOST_N5
GND_H
HOST_P6
HOST_N6
V
DD
_H
IREF
GND_I
V
DD
_I
CURRENT
ADJUST
-
+
÷1,2,4
PWR_DWN#
SEL_T
V
DD
HOST_P1
HOST_N1
GND_H
V
DD
HOST_P6
HOST_N6
GND_H
V
DD
HOST_P2
HOST_N2
GND_H
V
DD
HOST_P3
HOST_N3
GND_H
V
DD
HOST_P4
HOST_N4
GND_H
V
DD
HOST_P5
HOST_N5
GND_H
V
DD
MREF
nMREF
GND_H
PCLK
nPCLK
÷1,2,4
SEL_A
SEL_B
SEL_U
DIVIDER
CONTROL
48-Lead TSSOP
6.1mm x 12.5mm x .92mm body package
G Package
Top View
48-Lead SSOP
7.5mm x 15.9mm x 2.3mm body package
F Package
Top View
÷2,4
87158AG
www.idt.com
1
REV. C JULY 25, 2010
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