Z86227
CPS DC-4074-01
C
USTOMER
P
ROCUREMENT
S
PECIFICATION
Z86227
40-P
IN
L
OW
-C
OST
D
IGITAL
T
ELEVISION
C
ONTROLLER
(4LDTC)
GENERAL DESCRIPTION
The Z86227 40-pin Low-Cost Digital Television Controller
(4LDTC) introduces a new level of sophistication to single-chip
architecture. The Z86227 is a member of the Z8
®
single-chip
microcontroller family with 6 Kbytes of ROM and 236 bytes of
RAM. The device is offered in a 40-pin package and is CMOS
compatible. The 4LDTC offers mask programmed ROM which
enables the Z8 microcontroller to be used in a high volume
production application device embedded with a custom program
(customer supplied program) and combines together with the
Z86C27 (DTC) and Z86127 (LDTC) to provide support for high
end, mid range and low end TV applications.
Zilog’s 4LDTC offers fast execution, efficient use of memory,
sophisticated interrupts, input/output bit manipulation capabilities,
and easy hardware/software system expansion along with low
cost and low power consumption. The device provides an ideal
performance and reliability solution for consumer and industrial
television applications.
The Z86227 architecture is characterized by utilizing Zilog’s
advanced Superintegration™ design methodology. The device
has an 8-bit internal data path controlled by a Z8 microcontroller
and On Screen Display (OSD) logic circuits and Pulse Width
Modulators (PWM). On-chip peripherals include two register
mapped I/O ports (Ports 2 and Port 3), interrupt control logic (one
software, two external and three internal interrupts) and a standby
mode recovery input port (Port 3, pin P30).
The OSD control circuits support 6 rows by 20 columns of
characters. The character color is specified by row. One of the
eight rows is assigned to show two kinds of colors for bar type
displays such as volume control. The OSD is capable of displaying
either low resolution (5x7 dot pattern) or high resolution (11x15
dot pattern) characters.
A 14-bit PWM port provides enough voltage resolution for a
voltage synthesizer tuning system. Three 6-bit PWM ports are
used for controlling audio signal levels.
8-bit PWM ports used to vary picture levels.
Three
The 4LDTC applications demand powerful I/O capabilities. The
Z86227 fulfills this with 24 pins dedicated to input or output.
These lines are grouped into three ports, and are configurable
under software control to provide timing, status signals, parallel
I/O and an address/data bus for interfacing to external memory.
There are three basic address spaces available to support this
wide range of configurations: Program Memory, Video RAM,
and Register File. The Register File is composed of 236 bytes of
general purpose registers, two I/O Port registers, 15 control and
status registers and three reserved registers.
To unburden the program from coping with the real-time problems
such as counting/timing and data communication, the 4LDTC
offers two on-chip counter/timers with a large number of user
selectable modes (Figure 1).
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.: B//W
(WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Power
Ground
Circuit
V
CC
GND
Device
V
DD
V
SS
DC 4074-01
(8-25-93)
1
Z86227
CPS DC-4074-01
ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed under Absolute Maximum
Ratings may cause permanent damage to the device. This is a
stress rating only; operation of the device at any condition above
those
indicated
in
the
operational
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Symbol
V
CC
V
I
V
I
V
O
I
OH
I
OH
I
OL
I
OL
T
A
T
STG
Parameters
Power Supply Voltage*
Input Voltage
Input Voltage
Output Voltage
Output Current High
Output Current High
Output Current Low
Output Current Low
Operating Temperature
Storage Temperature
Min
–0.3
–0.3
–0.3
–0.3
Max
+7
V
CC
+0.3
V
CC
+0.3
V
CC
+8.0
–10
–100
20
200
Units
V
V
V
V
mA
mA
mA
mA
C
Notes
[1]
[2,3]
1 pin
All total
1 pin
All total
†
–65
+150
Notes:
[1] Port 2 open-drain
[2] PWM open-drain outputs
[3] PWM breakdown is 13.2V (normal operation). Will withstand
16V max. (non-momentary operating).
* Voltage on all pins with respect to GND.
† See Ordering Information
STANDARD TEST CONDITIONS
VDD
The characteristics listed below apply for standard test conditions
as noted. All voltages are referenced to GND. Positive current
flows into the referenced pin (Test Load Diagram).
RLL
From Output
Under Test
150 pF
RLH
Test Load Diagram
4
Analog electronics
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