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PIC32MX695F512L-80I/PF

Description
MCU 32-bit MIPS32 M4K RISC 512KB Flash 2.5V/3.3V 100-Pin TQFP Tray
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size3MB,440 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
Download Datasheet Download user manual Parametric View All

PIC32MX695F512L-80I/PF Overview

MCU 32-bit MIPS32 M4K RISC 512KB Flash 2.5V/3.3V 100-Pin TQFP Tray

PIC32MX695F512L-80I/PF Parametric

Parameter NameAttribute value
EU restricts the use of certain hazardous substancesCompliant
ECCN (US)3A991a.2.
Part StatusActive
HTS8542.31.00.01
Family NamePIC32
Instruction Set ArchitectureRISC
Device CoreMIPS32 M4K
Core ArchitecturePIC
Maximum CPU Frequency (MHz)80
Maximum Clock Rate (MHz)80
Data Bus Width (bit)32
Program Memory TypeFlash
Program Memory Size512KB
RAM Size128KB
Maximum Expanded Memory Size4GB
ProgrammabilityYes
Interface TypeEthernet/I2C/SPI/UART/USB
Number of I/Os85
No. of Timers5
PWM5
Number of ADCsSingle
ADC Channels16
ADC Resolution (bit)10
USART0
UART6
USB1
SPI4
I2C5
I2S0
CAN0
Ethernet1
Watchdog1
Analog Comparators2
Parallel Master PortYes
Real Time ClockYes
Minimum Operating Supply Voltage (V)2.3
Typical Operating Supply Voltage (V)2.5|3.3
Maximum Operating Supply Voltage (V)3.6
Minimum Operating Temperature (°C)-40
Maximum Operating Temperature (°C)85
Supplier Temperature GradeIndustrial
PackagingTray
Pin Count100
Standard Package NameQFP
Supplier PackageTQFP
MountingSurface Mount
Package Height1
Package Length14
Package Width14
PCB changed100
Lead ShapeGull-wing
PIC32MX5XX/6XX/7XX
32-bit Microcontrollers (up to 512 KB Flash and 128 KB SRAM)
with
Graphics Interface, USB, CAN, and Ethernet
Operating Conditions
• 2.3V to 3.6V, -40ºC to +105ºC, DC to 80 MHz
Timers/Output Compare/Input Capture
• Five General Purpose Timers:
- Five 16-bit and up to two 32-bit Timers/Counters
• Five Output Compare (OC) modules
• Five Input Capture (IC) modules
• Real-Time Clock and Calendar (RTCC) module
Core: 80 MHz/105 DMIPS MIPS32
®
M4K
®
• MIPS16e
®
mode for up to 40% smaller code size
• Code-efficient (C and Assembly) architecture
• Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply
Clock Management
0.9% internal oscillator (on some variants)
Programmable PLLs and oscillator clock sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer
Fast wake-up and start-up
Communication Interfaces
• USB 2.0-compliant Full-Speed OTG controller
• 10/100 Mbps Ethernet MAC with MII and RMII interface
• CAN module:
- 2.0B Active with DeviceNet™ addressing support
• Six UART modules (20 Mbps):
- Supports LIN 2.1 protocols and IrDA
®
support
• Up to four 4-wire SPI modules (25 Mbps)
• Up to five I
2
C modules (up to 1 Mbaud) with SMBus
support
• Parallel Master Port (PMP)
Power Management
Low-power management modes (Sleep and Idle)
Integrated Power-on Reset, Brown-out Reset
0.5 mA/MHz dynamic current (typical)
41 µA IPD current (typical)
Direct Memory Access (DMA)
• Up to eight channels of hardware DMA with automatic
data size detection
• 32-bit Programmable Cyclic Redundancy Check (CRC)
• Six additional channels dedicated to USB, Ethernet and
CAN modules
Graphics Features
• External graphics interface with up to 34 Parallel Master
Port (PMP) pins:
- Interface to external graphics controller
- Capable of driving LCD directly with DMA and
internal or external memory
Input/Output
• 15 mA or 10 mA source/sink for standard V
OH
/V
OL
and
up to 22 mA for non-standard V
OH1
• 5V-tolerant pins
• Selectable open drain and pull-ups
• External interrupts
Analog Features
• ADC Module:
- 10-bit 1 Msps rate with one Sample and Hold (S&H)
- 16 analog inputs
- Can operate during Sleep mode
• Flexible and independent ADC trigger sources
• Comparators:
- Two dual-input Comparator modules
- Programmable references with 32 voltage points
Qualification and Class B Support
• AEC-Q100 REVH (Grade 2 -40ºC to +105ºC)
• Class B Safety Library, IEC 60730
Debugger Development Support
In-circuit and in-application programming
4-wire MIPS
®
Enhanced JTAG interface
Unlimited program and six complex data breakpoints
IEEE 1149.2-compatible (JTAG) boundary scan
TFBGA
100
83
0.50
14x14x1
121
83
0.80
10x10x1.1
VTLA
124
83
0.50
9x9x0.9
Packages
Type
Pin Count
I/O Pins (up to)
Contact/Lead Pitch
Dimensions
Note:
QFN
64
51
0.50
9x9x0.9
64
51
0.50
10x10x1
TQFP
100
83
0.40
12x12x1
All dimensions are in millimeters (mm) unless specified.
2009-2016 Microchip Technology Inc.
DS60001156J-page 1

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