Data Sheet
FEATURES
Configurable 8-PWM engine with up to 3 channels
2 independent digitally controlled channel outputs
Voltage mode PWM control with 625 ps resolution
Remote voltage sensing on both channels
Programmable compensation filters
Voltage feedforward option
Flexible start-up sequencing and tracking
Switching frequency: 50 kHz to 625 kHz
Frequency synchronization
Independent channel protections: OVP and OCP
2 independent OTP circuits
Programmable fault protection sequence
Volt-second balance and dual-phase current balance
for interleaved configurations
On-board EEPROM
PMBus-compliant
Graphical user interface (GUI) for ease of programming
Available in a 40-lead, 6 mm × 6 mm LFCSP
3-Channel Digital
Power Supply Controller
ADP1053
GENERAL DESCRIPTION
The
ADP1053,
based on a voltage mode PWM architecture, is
a flexible, application dedicated digital controller designed for
isolated and nonisolated dc-to-dc power supply applications.
The
ADP1053
enables highly efficient power supply design and
facilitates the introduction of intelligent power management
techniques to improve energy efficiency at a system level.
The
ADP1053
provides control, monitoring, and protection
of up to three independent channel outputs. The eight flexible
PWM outputs can be configured as three independent channels:
two regulated channels with feedback control plus one additional
unregulated channel with a fixed duty cycle. The frequency of
these three channels can be programmed individually from
50 kHz to 625 kHz; all channels can be synchronized internally
or to an external signal.
All eight PWM outputs can also be assigned to enable a single-
channel solution, which may be required in high power, high
efficiency applications.
Features include differential voltage sensing, fast current sensing,
flexible start-up sequencing and tracking, and synchronization
between devices to reduce low frequency system noise. Protection
and monitoring features include overcurrent protection (OCP),
undervoltage protection (UVP), overvoltage protection (OVP),
and overtemperature protection (OTP).
APPLICATIONS
AC-to-DC power supplies
Isolated dc-to-dc power supplies
Intermediate rail power supplies
Nonisolated dc-to-dc power converter
SIMPLIFIED TYPICAL APPLICATION CIRCUIT
VIN_DC
DRIVER
DRIVER
V
OUT
A+
LOAD
DRIVER
R
SENSE
V
OUT
A–
ADP1053
PWM
OUTPUTS
CS2–_A
CS2+_A
VS+_A
VS–_A
iCoupler
10241-001
V
OUT
B+
DUPLICATE THE ABOVE SCHEMATICS FOR CHANNEL B
V
OUT
B–
Figure 1.
Rev. A
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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www.analog.com
Fax: 781.461.3113
©2012 Analog Devices, Inc. All rights reserved.
ADP1053
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Simplified Typical Application Circuit .......................................... 1
Revision History ............................................................................... 3
Functional Block Diagram .............................................................. 4
Specifications..................................................................................... 5
Absolute Maximum Ratings............................................................ 9
Thermal Resistance ...................................................................... 9
Soldering........................................................................................ 9
ESD Caution.................................................................................. 9
Pin Configuration and Function Descriptions........................... 10
Application Circuits ....................................................................... 12
Theory of Operation ...................................................................... 14
PWM Outputs (OUT1 to OUT8) ............................................ 14
Frequency Synchronization ...................................................... 16
Voltage Sense............................................................................... 16
Current Sense.............................................................................. 17
SR FETs Reverse Current Protection ....................................... 19
Control Loops and Feedback References ................................ 19
Voltage Setting with Slew Rate.................................................. 19
Digital Filters............................................................................... 20
ACSNS and Input Feedforward................................................ 20
Light Load Mode and Phase Shedding.................................... 21
Power-Good Signals................................................................... 21
Soft Start and Shutdown............................................................ 21
Synchronous Rectifier (SR) Soft Start...................................... 24
Volt-Second Balance and Current Balance ............................. 24
Power Monitoring and Flags ......................................................... 25
Monitoring Functions................................................................ 25
Voltage Readings ........................................................................ 25
Current Readings........................................................................ 25
Temperature Readings (RTD1 and RTD2 Pins)..................... 25
Temperature Linearization Scheme ......................................... 26
Channel A and Channel B Duty Cycle Readings ................... 27
Flags.............................................................................................. 27
Housekeeping Flags.................................................................... 27
Overvoltage Protection (OVP) Flags ....................................... 27
Undervoltage Protection (UVP) Flags..................................... 27
Data Sheet
ACSNS Flag................................................................................. 28
Overcurrent Protection (OCP) Flags ...................................... 28
Overtemperature Protection (OTP) and Overtemperature
Warning (OTW) Flags............................................................... 29
External Flag Input (FLGI/SYNI Pin) ..................................... 30
Protection Actions...................................................................... 30
Flag Blanking During Soft Start ............................................... 30
Latched Flags............................................................................... 30
First Flag ID Recording ............................................................. 31
Power Supply Calibration and Trim ............................................ 32
CS, CS1_A, and CS1_B Gain Trim .......................................... 32
CS2_A and CS2_B Offset and Gain Trim............................... 32
VS_A and VS_B Gain Trim ...................................................... 32
ACSNS Gain Trim...................................................................... 32
RTD1, RTD2, OTP1, and OTP2 Trim..................................... 33
Layout Guidelines....................................................................... 33
PMBus/I
2
C Communication......................................................... 34
Features........................................................................................ 34
Overview ..................................................................................... 34
PMBus/I
2
C Address ................................................................... 34
Data Transfer............................................................................... 35
General Call Support ................................................................. 36
Fast Mode .................................................................................... 36
Fault Conditions ......................................................................... 36
Timeout Conditions................................................................... 36
Data Transmission Faults .......................................................... 37
Data Content Faults ................................................................... 37
EEPROM ......................................................................................... 38
Features........................................................................................ 38
Overview ..................................................................................... 38
Page Erase Operation................................................................. 38
Read Operation (Byte Read and Block Read) ........................ 38
Write Operation (Byte Write and Block Write) ..................... 39
EEPROM Password.................................................................... 40
Downloading EEPROM Settings to Internal Registers......... 40
Saving Register Settings to the EEPROM ............................... 40
EEPROM CRC Checksum ........................................................ 40
Software GUI .................................................................................. 41
Rev. A | Page 2 of 84
Data Sheet
PMBus Command Set (Supported by the ADP1053) ................42
Manufacturer-Specific Extended Command List .......................44
PMBus Command Descriptions ...................................................46
CLEAR_FAULTS Command.....................................................46
WRITE_PROTECT Command ................................................46
RESTORE_DEFAULT_ALL Command ..................................46
STORE_USER_ALL Command................................................46
RESTORE_USER_ALL Command ..........................................46
CAPABILITY Command...........................................................46
STATUS_BYTE Command .......................................................47
STATUS_WORD Command.....................................................47
Read Temperature Commands .................................................47
PMBUS_REVISION Command ...............................................48
MFR_ID Command ...................................................................48
MFR_MODEL Command .........................................................48
MFR_REVISION Command ....................................................48
EEPROM_DATA_00 Through EEPROM_DATA_15
Commands...................................................................................48
EEPROM_CRC_CHKSUM Command...................................48
EEPROM_NUM_RD_BYTES Command ..............................48
EEPROM_ADDR_OFFSET Command ..................................48
EEPROM_PAGE_ERASE Command ......................................49
EEPROM_PASSWORD Command .........................................49
TRIM_PASSWORD Command................................................49
EEPROM_INFO Command......................................................49
ADP1053
Manufacturer-Specific Extended Command Register
Descriptions .....................................................................................50
Flag Configuration Registers.....................................................50
Switching Frequency Registers..................................................53
Channel A/Channel B Current Sense and Limit Setting
Registers .......................................................................................56
Channel A/Channel B Voltage Sense and Limit Setting
Registers .......................................................................................57
Soft Start, Digital Filter, and Modulation Setting Registers ..60
PWM Output Timing Registers................................................64
GO Command Register..............................................................65
Balance Control Registers..........................................................66
Synchronization Setting Registers ............................................67
SR and Channel C Soft Start Setting Registers........................68
Light Load PWM Disable Registers .........................................69
Fast OCP and Channel C Current Sense Setting Registers...69
Temperature Sense and Protection Setting Registers.............72
ACSNS and Feedforward Setting Registers.............................73
PSON Registers ...........................................................................74
RTD Trim Registers ....................................................................76
Customized Registers .................................................................77
Flag Registers...............................................................................79
Value Registers ............................................................................82
Outline Dimensions........................................................................84
Ordering Guide ...........................................................................84
REVISION HISTORY
6/12—Rev.
0 to Rev. A
Changes to Source Current and Temperature Readings According
to Internal Linearization Scheme Parameters, Table 1.............7
Changes to Table 121 and Table 122.............................................76
Changes to Ordering Guide...........................................................84
1/12—Revision 0: Initial Version
Rev. A | Page 3 of 84
ADP1053
The
ADP1053
provides local and remote differential sensing
of the output voltage, which is converted to the digital domain
using high speed, high resolution Σ-Δ converters. The proprie-
tary conversion system maximizes the bandwidth of the converter
and minimizes output noise due to digital quantization error,
thus dramatically reducing the power consumption of the digital
controller.
Configurable compensation networks provide three poles and
two zeros to control feedback loop stability and optimize output
response. In addition, a programmable feedforward feature can
be enabled to enhance input voltage response.
The
ADP1053
provides extensive protection and monitoring
capabilities. For example, each regulated output has its own
independent voltage threshold, and overvoltage protection is
provided for each regulated output. The protection and moni-
toring features combine to eliminate the possibility of a single
point of failure.
Fast overcurrent protection is provided to protect the system
from short circuits. Accurate current sensing and overcurrent
limit protections are also included. In addition, two overtemp-
erature protection circuits are provided for use with 100 kΩ
thermistors to sense the hot spots.
Data Sheet
Other protection and monitoring features include a program-
mable power-on (PSON) function and power-good monitoring
for Channel A and Channel B.
All these features are programmable through the PMBus/I
2
C
interface. This interface is also used for calibration. Additional
information, such as input current, output current, and fault
flag status, can be read via the PMBus/I
2
C interface.
The built-in EEPROM is used to store programmed values and
instructions. System reliability is improved through a built-in
checksum and redundancy of critical circuits. In the event of a
system fault, the EEPROM can be configured to capture the first
instance of failure; this stored fault data can be analyzed to improve
overall system reliability and reduce failure mode analysis time.
The
ADP1053
is designed to maximize ease of use and reduce
time to market with the provision of a comprehensive, easy to
use graphical user interface (GUI) that allows programming of
most parameters and protection and monitoring limits.
The
ADP1053
is available in a 40-lead LFCSP package and
operates from a single 3.3 V supply.
FUNCTIONAL BLOCK DIAGRAM
CS2+_A CS2–_A
VS+_A VS–_A
OVP_A PGND_A
PGND_B OVP_B
CS2–_B CS2+_B
VS–_B VS+_B
1.2V
1.2V
CS1_A
ADC
ADC
ADC
DAC
DAC
ADC
ADC
ADC
CS1_B
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
FLGI/SYNI
FLGO/SYNO
PSON_A
PSON_B
PGOOD_A
ADC
ADC
PWM
ENGINE
DIGITAL CORE
8kBYTE
EEPROM
I
2
C
INTERFACE
ADC
1.2V
CS
ADC
ACSNS
UVLO
LDO
VDD
VCORE
DGND
SCL
SDA
AGND
OSC
RES
10241-002
PGOOD_B
ADP1053
RTD2
RTD1 ADD
VREF
Figure 2.
Rev. A | Page 4 of 84
Data Sheet
SPECIFICATIONS
V
DD
= 3.0 V to 3.6 V, T
A
= −40°C to +125°C, unless otherwise noted. FSR = full-scale range.
Table 1.
Parameter
SUPPLY
V
DD
I
DD
Test Conditions/Comments
Min
3.0
PWM pins unloaded
Normal operation (PSON high)
Power supply off (PSON low)
Shutdown (V
DD
below UVLO)
During EEPROM programming
Typ
3.3
30
30
100
I
DD
+ 8
Max
3.6
ADP1053
Unit
V
mA
mA
μA
mA
POWER-ON RESET
UVLO Threshold
V
DD
Rising
V
DD
Falling
OVLO Threshold
OVLO Debounce
VCORE PIN
Output Voltage
OSCILLATOR AND PLL
PLL Frequency
DPWM Resolution
VS_A, VS_B VOLTAGE SENSE
Input Voltage
Input Voltage FSR
VS_A, VS_B Accurate ADCs
Valid Input Voltage Range
ADC Register Update Rate
Resolution
Measurement Accuracy
2.750
3.7
When set to 2 μs
When set to 500 μs
330 nF capacitor between VCORE and
DGND
RES = 10 kΩ
2.3
2.85
3.9
2
500
2.5
3.0
2.975
4.1
V
V
V
μs
μs
V
2.7
200
625
0
1
1.6
0
100
12
1.5
1.6
MHz
ps
V
V
V
Hz
Bits
% FSR
mV
% FSR
mV
% FSR
mV
mV/°C
mV
Differential voltage from VS+_A to
VS−_A and from VS+_B to VS−_B
From 0% to 100% of valid input voltage
From 10% to 90% of valid input voltage
From 900 mV to 1.1 V
Temperature Stability
Common-Mode Voltage Offset
VS_A, VS_B High Speed ADCs
Equivalent Resolution
Dynamic Range
VS_A, VS_B UVP
Threshold Accuracy
Comparator Update Speed
OVP_A, OVP_B PINS
Threshold Accuracy
Propagation Delay (Latency)
From 900 mV to 1.1 V
Voltage from VS−_A and VS−_B to AGND
to achieve measurement accuracy
At 390.6 kHz switching frequency
Regulation voltage 300 mV to 1.4 V
Based on VS_A, VS_B accurate ADC
Same as accurate ADC measurement
accuracy specifications
−2.8
−44.8
−1.35
−21.6
−1.2
−19.2
−0.1
−200
0
+2.1
+33.6
+2.1
+33.6
+1.65
+26.4
+0.1
+200
6
±10
Bits
mV
10
−1.7
Debounce time not included
58
+1.6
110
ms
%
ns
Rev. A | Page 5 of 84
Embedded System
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