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NSVDTA114EET1G

Description
Bipolar Transistors - Pre-Biased SS SC75 BR XSTR PNP 50V
CategoryDiscrete semiconductor    The transistor   
File Size171KB,12 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
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NSVDTA114EET1G Overview

Bipolar Transistors - Pre-Biased SS SC75 BR XSTR PNP 50V

NSVDTA114EET1G Parametric

Parameter NameAttribute value
Brand NameON Semiconductor
Is it lead-free?Lead free
MakerON Semiconductor
package instructionSMALL OUTLINE, R-PDSO-G3
Manufacturer packaging code463-01
Reach Compliance Codecompliant
ECCN codeEAR99
Factory Lead Time4 weeks
Other featuresBUILT IN BIAS RESISTANCE RATIO IS 1
Maximum collector current (IC)0.1 A
Collector-emitter maximum voltage50 V
ConfigurationSINGLE WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE)35
JESD-30 codeR-PDSO-G3
JESD-609 codee3
Humidity sensitivity level1
Number of components1
Number of terminals3
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typePNP
GuidelineAEC-Q101
surface mountYES
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
MUN2111, MMUN2111L,
MUN5111, DTA114EE,
DTA114EM3, NSBA114EF3
Digital Transistors (BRT)
R1 = 10 kW, R2 = 10 kW
PNP Transistors with Monolithic Bias
Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a base−
emitter resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space.
Features
PIN 1
BASE
(INPUT)
www.onsemi.com
PIN CONNECTIONS
PIN 3
COLLECTOR
(OUTPUT)
R1
R2
PIN 2
EMITTER
(GROUND)
MARKING DIAGRAMS
SC−59
CASE 318D
STYLE 1
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
S and NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC-Q101 Qualified
and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(T
A
= 25°C)
Rating
Collector−Base Voltage
Collector−Emitter Voltage
Collector Current
Continuous
Input Forward Voltage
Input Reverse Voltage
Symbol
V
CBO
V
CEO
I
C
V
IN(fwd)
V
IN(rev)
Max
50
50
100
40
10
Unit
Vdc
Vdc
mAdc
Vdc
Vdc
XX MG
G
1
XXX MG
G
1
XX MG
G
1
XX M
1
XX M
1
XM 1
XXX
M
G
SOT−23
CASE 318
STYLE 6
SC−70/SOT−323
CASE 419
STYLE 3
SC−75
CASE 463
STYLE 1
SOT−723
CASE 631AA
STYLE 1
SOT−1123
CASE 524AA
STYLE 1
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
= Specific Device Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending up-
on manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking, and shipping information in
the package dimensions section on page 2 of this data sheet.
©
Semiconductor Components Industries, LLC, 2000
October, 2016
Rev. 8
1
Publication Order Number:
DTA114E/D

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Description Bipolar Transistors - Pre-Biased SS SC75 BR XSTR PNP 50V Bipolar Transistors - Pre-Biased SS SC59 BR XSTR PNP SPCL Bipolar Transistors - Pre-Biased SOT-723 BIAS RESISTOR Bipolar Transistors - BJT SS BR XSTR SPCL TR Bipolar Transistors - Pre-Biased 100mA 50V BRT PNP
Brand Name ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor
Is it lead-free? Lead free Lead free Lead free Lead free Lead free
package instruction SMALL OUTLINE, R-PDSO-G3 SMALL OUTLINE, R-PDSO-G3 SMALL OUTLINE, R-PDSO-F3 SMALL OUTLINE, R-PDSO-G3 SMALL OUTLINE, R-PDSO-G3
Manufacturer packaging code 463-01 318D-04 631AA 318-08 318-08
Reach Compliance Code compliant compliant compliant compliant compliant
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99
Factory Lead Time 4 weeks 8 weeks 4 weeks 1 week 1 week
Other features BUILT IN BIAS RESISTANCE RATIO IS 1 BUILT-IN BIAS RESISTOR RATIO IS 1 BUILT IN BIAS RESISTANCE RATIO IS 1 BUILT IN BIAS RESISTANCE RATIO IS 1 BUILT-IN BIAS RESISTOR RATIO 1
Maximum collector current (IC) 0.1 A 0.1 A 0.1 A 0.1 A 0.1 A
Collector-emitter maximum voltage 50 V 50 V 50 V 50 V 50 V
Configuration SINGLE WITH BUILT-IN RESISTOR SINGLE WITH BUILT-IN RESISTOR SINGLE WITH BUILT-IN RESISTOR SINGLE WITH BUILT-IN RESISTOR SINGLE WITH BUILT-IN RESISTOR
Minimum DC current gain (hFE) 35 35 35 35 35
JESD-30 code R-PDSO-G3 R-PDSO-G3 R-PDSO-F3 R-PDSO-G3 R-PDSO-G3
JESD-609 code e3 e3 e3 e3 e3
Humidity sensitivity level 1 1 1 1 1
Number of components 1 1 1 1 1
Number of terminals 3 3 3 3 3
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED 260
Polarity/channel type PNP PNP PNP PNP PNP
surface mount YES YES YES YES YES
Terminal surface Tin (Sn) Tin (Sn) Tin (Sn) Tin (Sn) Tin (Sn)
Terminal form GULL WING GULL WING FLAT GULL WING GULL WING
Terminal location DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED 40
transistor applications SWITCHING SWITCHING SWITCHING SWITCHING SWITCHING
Transistor component materials SILICON SILICON SILICON SILICON SILICON
Maker ON Semiconductor ON Semiconductor ON Semiconductor ON Semiconductor -
Guideline AEC-Q101 - AEC-Q101 AEC-Q101 -
Contacts - 3 - 3 3
Maximum power dissipation(Abs) - 0.338 W - 0.4 W 0.2 W
Base Number Matches - 1 - 1 1
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