The V386 is an ideal LVDS receiver that converts 4-pair
LVDS data streams into parallel 28 bits of CMOS/TTL
data with bandwidth up to 2.38 Gbps throughput or
297.5 Mbytes per second.
This chip is an ideal means to solve EMI and cable size
problems associated with wide, high-speed TTL
interfaces through very low-swing LVDS signals.
ICS manufactures a large variety of video application
devices. Consult ICS for all of your video application
requirements.
Features
•
Pin and function compatible with the National
DS90CF386, THine THC63LVDF84, TI
SN65LVDS94
•
Converts 4-pair LVDS data streams into parallel 28
bits of CMOS/TTL data
Pin Assignments
RxOUT22
RxOUT23
RxOUT24
GND
RxOUT25
RxOUT26
RxOUT27
LVDS_GND
RxIN0-
RxIN0+
RxIN1-
RxIN1+
LVDS_VCC
LVDS_GND
RxIN2-
RxIN2+
RxCLKIN-
RxCLKIN+
RxIN3-
RxIN3+
LVDS_GND
PLL_GND
PLL_VCC
PLL_GND
PWRDWN
RxCLKOUT
RxOUT0
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
VCC
RxOUT21
RxOUT20
RxOUT19
GND
RxOUT18
RxOUT17
RxOUT16
VCC
RxOUT15
RxOUT14
RxOUT13
GND
RxOUT12
RxOUT11
RxOUT10
VCC
RxOUT9
RxOUT8
RxOUT7
GND
RxOUT6
RxOUT5
RxOUT4
RxOUT3
VCC
RxOUT2
RxOUT1
•
•
•
•
•
•
•
•
•
•
Fully spread spectrum compatible
Wide clock frequency range from 20 MHz to 85 MHz
Supports VGA, SVGA, XGA, and SXGA
LVDS voltage swing of 350 mV for low EMI
On-chip PLL requires no external components
Low-power CMOS design
Falling edge clock triggered outputs
Power-down control function
Compatible with TIA/EIA-644 LVDS standards
Packaged in a 56-pin TSSOP (Pb free available)
Block Diagram
RxIN0+
RxIN0-
RxIN1+
RxIN1-
RxIN2+
RxIN2-
RxIN3+
RxIN3-
RxCLKIN+
RxCLKIN-
PWRDWN
PLL
LVDS to TTL
De-serializer
8
8
8
RED
GREEN
BLUE
HSYNC
VSYNC
DATA ENABLE
CONTROL
RxCLKOUT
RxOUT0..27
V386
56-pin TSSOP
V386
V386 Datasheet
1
5/25/05
Revision 2.0
I n t e g r a t e d C i r c u i t S y s t e m s • 5 2 5 R a c e Str e e t , S a n J o s e , C A 9 51 2 6 • t e l ( 4 0 8 ) 2 9 7 - 1 2 0 1 • ww w.i c s t . c o m
V386
8-B
IT
LVDS R
ECEIVER FOR
V
IDEO
Pin Descriptions
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Pin name
RxOUT22
RxOUT23
RxOUT24
GND
RxOUT25
RxOUT26
RxOUT27
LVDS_GND
RxIN0-
RxIN0+
RxIN1-
RxIN1+
LVDS_VCC
LVDS_GND
RxIN2-
RxIN2+
RxCLKIN-
RxCLKIN+
RxIN3-
RxIN3+
LVDS_GND
PLL_GND
PLL_VCC
PLL_GND
PWRDWN
Type
OUT
OUT
OUT
Ground
OUT
OUT
OUT
Ground
LVDS IN
LVDS IN
LVDS IN
LVDS IN
Power
Ground
LVDS IN
LVDS IN
LVDS IN
LVDS IN
LVDS IN
LVDS IN
Ground
Ground
Power
Ground
IN
Description
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Digital ground
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Analog ground
LVDS input (-)
LVDS input (+)
LVDS input (-)
LVDS input (+)
Analog power
Analog ground
LVDS input (-)
LVDS input (+)
LVDS input (-)
LVDS input (+)
LVDS input (-)
LVDS input (+)
Analog ground
PLL ground
PLL power
PLL ground
Power-down control input.
H: Nomal
L: Power down, all ouputs are pulled low.
Clock output
Data outputs on pins (RxOUT0..27)
Digital ground
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Digital power
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
26
27
28
29
30
31
32
33
RxCLKOUT
RxOUT0
GND
RxOUT1
RxOUT2
VCC
RxOUT3
RxOUT4
OUT
OUT
Ground
OUT
OUT
Power
OUT
OUT
V386 Datasheet
2
5/25/05
Revision 2.0
I n t e g r a t e d C i r c u i t S y s t e m s • 5 2 5 R a c e Str e e t , S a n J o s e , C A 9 51 2 6 • t e l ( 4 0 8 ) 2 9 7 - 1 2 0 1 • ww w.i c s t . c o m
V386
8-B
IT
LVDS R
ECEIVER FOR
V
IDEO
Pin
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
Pin name
RxOUT5
RxOUT6
GND
RxOUT7
RxOUT8
RxOUT9
VCC
RxOUT10
RxOUT11
RxOUT12
GND
RxOUT13
RxOUT14
RxOUT15
VCC
RxOUT16
RxOUT17
RxOUT18
GND
RxOUT19
RxOUT20
RxOUT21
VCC
Type
OUT
OUT
Ground
OUT
OUT
OUT
Power
OUT
OUT
OUT
Ground
OUT
OUT
OUT
Power
OUT
OUT
OUT
Ground
OUT
OUT
OUT
Power
Description
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Digital ground
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Digital power
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Digital ground
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Digital power
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Digital ground
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Data outputs on pins (RxOUT0..27)
Digital power
.
V386 Datasheet
3
5/25/05
Revision 2.0
I n t e g r a t e d C i r c u i t S y s t e m s • 5 2 5 R a c e Str e e t , S a n J o s e , C A 9 51 2 6 • t e l ( 4 0 8 ) 2 9 7 - 1 2 0 1 • ww w.i c s t . c o m
V386
8-B
IT
LVDS R
ECEIVER FOR
V
IDEO
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the V386. These ratings, which are
standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at
these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VCC
CMOS/TTL Output Voltage
LVDS Receiver Input Voltage
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature (10 seconds max.)
Maximum Package Power
Package Derating
-0.3 V to +4 V
-0.3 V to (VCC+0.3 V)
-0.3 V to (VCC+0.3 V)
0 to +70
°
C
-65 to +150
°
C
150
°
C
260
°
C
1.61 W (V386)
12.4 mW/°C above +25°C
15 mW/°C above +25°C
Rating
Recommended Operation Conditions
Parameter
Ambient Operating Temperature (Ta)
3.3 V Supply Voltage (VCC)
Receiver Input Range (V
IN
)
Supply Noise Voltage (V
N
)
Min.
0
3
0
Typ.
25
3.3
Max.
70
3.6
2.4
100
Units
°
C
V
V
mVpp
Electrical Characteristics
VDD=3.3 V ±10%,
Ambient temperature 0 to 70°C
Parameter
CMOS/TTL DC Specifications
Symbol
V
IH
V
IL
V
OH
V
OL
V
CL
I
IN
Conditions
Min.
2.0
GND
Typ.
Max.
VCC
0.8
Units
V
V
V
V
V
µ
A
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Input Clamp Voltage
Input Current
I
OH
= -0.4 mA
I
OL
= 2 mA
I
CL
= -18mA
VCC
2.7
3.3
0.06
-0.79
VCC
0.3
-1.5
±15
V386 Datasheet
4
5/25/05
Revision 2.0
I n t e g r a t e d C i r c u i t S y s t e m s • 5 2 5 R a c e Str e e t , S a n J o s e , C A 9 51 2 6 • t e l ( 4 0 8 ) 2 9 7 - 1 2 0 1 • ww w.i c s t . c o m
V386
8-B
IT
LVDS R
ECEIVER FOR
V
IDEO
Parameter
Output Short Circuit Current
LVDS Receiver DC Specifications
Symbol
0V
I
OS
V
TH
V
TL
I
IN
Conditions
V
OUT
= 0V
V
CM
= +1.2 V
Min.
Typ.
Max.
±10
-60
+100
Units
mA
mV
mV
µ
A
µ
A
Differential Input High Threshold
Differential Input Low Threshold
Input Current
Receiver Supply Current
-100
V
IN
= +2.4 V, VCC = 3.6 V
V
IN
= 0V, VCC = 3.6 V
±10
±15
220
240
125
140
140
400
Receiver Supply Current (worst case)
I
CCRW
C
L
= 8 pF, f = 65 MHz, worst
case pattern
C
L
= 8 pF, f = 85 MHz, worst
case pattern
mA
mA
mA
mA
µ
A
Receiver Supply Current (16
Grayscale)
I
CCRG
C
L
= 8 pF, f = 65 MHz, 16
Grayscale pattern
C
L
= 8 pF, f = 85 MHz, 16
Grayscale pattern
Receiver Supply Current (Power
Down)
Receiver Switching Characteristics
I
CCRZ
Power_Down = Low,
Receiver outputs stay low
during Power-down mode
20% to 80% VCC, C
L
= 8 pF
80% to 20% VCC, C
L
= 8 pF
11.76
f = 85 MHz
f = 85 MHz
f = 85 MHz
f = 85 MHz
25
°
C / 3.3 V
4.5
4
2.0
3.5
8
CMOS/TTL Low-to-High Transition
Time
CMOS/TTL High-to-Low Transition
Time
CLKOUT period
CLKOUT High Time
CLKOUT Low Time
Data Setup to CLKOUT
Data Hold to CLKOUT
RCK+/- to CLKOUT Delay
Receiver PLL Setup Time
Receiver Power Down Delay
Receiver Input Strobe Position for
Bit0
Receiver Input Strobe Position for
Bit1
Receiver Input Strobe Position for
Bit2
Receiver Input Strobe Position for
Bit3
Receiver Input Strobe Position for
Bit4
CLHT
CHLT
RCOP
RCOH
RCOL
RSRC
RHRC
RCCD
RPLLS
RPDD
RSPos0
RSPos1
RSPos2
RSPos3
RSPos4
2
1.8
T
5
5
3.5
3.5
50
7
6.5
ns
ns
ns
ns
ns
ns
ns
14
20
10
1
ns
ms
µ
s
f = 85 MHz, T = 11.76 ns
f = 85 MHz, T = 11.76 ns
f = 85 MHz, T = 11.76 ns
f = 85 MHz, T = 11.76 ns
f = 85 MHz, T = 11.76 ns
0.49
2.17
3.85
5.53
7.21
0.84
2.52
4.2
5.88
7.56
1.19
2.87
4.55
6.23
7.91
ns
ns
ns
ns
ns
V386 Datasheet
5
5/25/05
Revision 2.0
I n t e g r a t e d C i r c u i t S y s t e m s • 5 2 5 R a c e Str e e t , S a n J o s e , C A 9 51 2 6 • t e l ( 4 0 8 ) 2 9 7 - 1 2 0 1 • ww w.i c s t . c o m
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