DATASHEET
ISL80030, ISL80030A, ISL80031, ISL80031A
3A Synchronous Buck Converter in 2x2 DFN Package
The
ISL80030, ISL80030A, ISL80031,
and
ISL80031A
are highly
efficient, monolithic, synchronous step-down DC/DC converters
that can deliver up to 3A of continuous output current from a 2.7V
to 5.5V input supply. They use peak current mode control
architecture to allow very low duty cycle operation. These devices
operate at either a 1MHz or 2MHz switching frequency, thereby
providing superior transient response and allowing for the use of
small inductors. They also have excellent stability.
The ISL80030, ISL80030A, ISL80031, and ISL80031A integrate
very low r
DS(ON)
MOSFETs to maximize efficiency. In addition,
because the high-side MOSFET is a PMOS, the need for a Boot
capacitor is eliminated, thereby reducing external component
count. The devices can operate at 100% duty cycle.
The ISL80030 and ISL80030A are configured for PWM pulse
width modulation operation and provide a fast transient
response, which helps reduce the output noise and RF
interference.
The ISL80031 and ISL80031A are configured for PFM
discontinuous conduction operation and provide high
efficiency by reducing switching losses at light loads.
These devices are offered in a space saving 8 Ld 2mmx2mm
DFN Pb-free package with exposed pad for improved thermal
performance. The complete converter occupies an area less
than 64mm
2
.
FN8766
Rev.2.00
Nov 16, 2017
Features
• V
IN
range 2.7V to 5.5V
• Up to 3A of output current
• Switching frequency of 1MHz or 2MHz (see
Table 1 on page 3)
• 35µA quiescent current (ISL80031 and ISL80031A)
• Overcurrent and short-circuit protection
• Over-temperature/thermal protection
• Negative current protection
• Power-good and enable
• 100% duty cycle
• Internal soft-start and soft-stop
• V
IN
undervoltage lockout and V
OUT
overvoltage protection
• Up to 95% peak efficiency
Applications
• General purpose POL
• Industrial, instrumentation, and medical equipment
• Telecom and networking equipment
• Game consoles
Related Literature
• For a full list of related documents, visit our website
-
ISL80030, ISL80030A, ISL80031, ISL80031A
product
pages
ISL80030/ISL80031
VIN
GND
+2.7 TO +5.5V
C
1
22µF
2
1
VIN
PHASE 8
7
C
3
22pF
R
1
200k
1%
L
1
C
2
22µF
+1.8V/3A
VOUT
100
V
OUT
= 3.3V
93
EFFICIENCY (%)
87
80
73
67
60
V
OUT
= 1.8V
V
OUT
= 2.5V
VIN
EPAD
GND
PGND
EN
3
EN
PGND
6
PG
4
PG
9
FB
5
0.6V R
2
100k
1%
(EQ. 1)
V
O
-
R
1
= R
2
----------- –
1
VFB
0
0.3
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3.0
LOAD (A)
FIGURE 1. TYPICAL APPLICATION CIRCUIT CONFIGURATION
FIGURE 2. EFFICIENCY vs LOAD, ISL80031,
V
IN
= 5V, T
A
= +25°C
FN8766 Rev.2.00
Nov 16, 2017
Page 1 of 20
ISL80030, ISL80030A, ISL80031, ISL80031A
Table of Contents
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Typical Performance Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Theory of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PWM Control Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PFM Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Short-Circuit Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Negative Current Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
UVLO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enable, Disable and Soft-Start Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Discharge Mode (Soft-Stop) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
100% Duty Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Derating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Inductor and Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Voltage Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Layout Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
15
15
16
16
16
16
16
16
16
17
17
17
17
18
18
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
FN8766 Rev.2.00
Nov 16, 2017
Page 2 of 20
ISL80030, ISL80030A, ISL80031, ISL80031A
TABLE 1. SUMMARY OF KEY DIFFERENCES
PART#
ISL80030
ISL80030A
ISL80031
ISL80031A
PWM/PFM MODE
PWM
PWM
PFM
PFM
f
SW
(MHz)
1
2
1
2
2.7 to 5.5
3
8 pin 2mmx2mm DFN
V
IN
RANGE
(V)
I
OUT
(MAX)
(A)
PACKAGE
SIZE
NOTE: In this datasheet, the parts in this table are collectively called “device”.
TABLE 2. COMPONENT VALUE SELECTION TABLE
V
OUT
(V)
0.8
1.2
1.5
1.8
2.5
3.3
C
1
(µF)
22
22
22
22
22
22
C
2
(µF)
22
22
22
22
22
22
C
3
(pF)
22
22
22
22
22
22
L
1
(µH)
1.0~2.2
1.0~2.2
1.0~2.2
1.0~3.3
1.5~3.3
1.5~4.7
R
1
(kΩ)
33
100
150
200
316
450
R
2
(kΩ)
100
100
100
100
100
100
FN8766 Rev.2.00
Nov 16, 2017
Page 3 of 20
ISL80030, ISL80030A, ISL80031, ISL80031A
Pin Configuration
ISL80030, ISL80030A, ISL80031, ISL80031A
(8 LD 2x2 DFN)
TOP VIEW
VIN
VIN
EN
PG
1
2
3
4
8
7
6
5
PHASE
PGND
PGND
FB
EPAD
(GND)
PAD
Pin Descriptions
PIN NUMBER
1, 2
PIN NAME
VIN
PIN DESCRIPTION
The input supply for the power stage of the PWM regulator and the source for the internal linear regulator that provides
bias for the IC. Place a minimum of 10µF ceramic capacitance from VIN to GND and as close as possible to the IC for
decoupling.
Device enable input. When the voltage on this pin rises above 1.4V, the device is enabled. The device is disabled when
the pin is pulled to ground. When the device is disabled, a 100Ω resistor discharges the output through the PHASE pin.
See
Figure 3, “Functional Block Diagram” on page 5
for details.
The power-good output is pulled to ground during the soft-start interval and also when the output voltage is below
regulation limits. This pin has an internal 5MΩ internal pull-up resistor.
Feedback pin for the regulator. FB is the negative input to the voltage loop error amplifier. The output voltage is set by
an external resistor divider connected to FB. In addition, the power-good PWM regulator’s power-good and undervoltage
protection circuits use FB to monitor the output voltage.
Power and analog ground connections. Connect directly to the board GROUND plane.
Power stage switching node for output voltage regulation. Connect to the output inductor. This pin is discharged by a
100Ω resistor when the device is disabled. See
Figure 3, “Functional Block Diagram” on page 5
for details.
The exposed pad must be connected to the PGND pin for proper electrical performance. Place as many vias as possible
under the pad connecting to the PGND plane for optimal thermal performance.
3
EN
4
5
PG
FB
6, 7
8
-
PGND
PHASE
EPAD
FN8766 Rev.2.00
Nov 16, 2017
Page 4 of 20
ISL80030, ISL80030A, ISL80031, ISL80031A
Functional Block Diagram
SOFT-
Soft
START
27pF
SHUTDOWN
200kΩ
+
BANDGAP
-
SHUTDOWN
3pF
FB
1.15*VREF
6kΩ
SLOPE
Slope
COMP
VIN
-
+
OV
OCP
0.85*VREF
VIN
+
5MΩ
PG
1ms
DELAY
0.3V
FN8766 Rev.2.00
Nov 16, 2017
+
EN
VREF
OSCILLATOR
EAMP
+
COMP
-
PWM/PFM
LOGIC
CONTROLLER
PROTECTION
HS DRIVER
P
PHASE
+
N
PGND
+
CSA
-
+
-
-
UV
SKIP
+
-
NEG CURRENT
SENSING
-
SCP
ZERO-CROSS
SENSING
+
100Ω
SHUTDOWN
FIGURE 3. FUNCTIONAL BLOCK DIAGRAM
Page 5 of 20
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