74AUP1G3208GM,132 datasheet, PDF

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74AUP1G3208GM,132: DescriptionLogic Gates 1.8V 1G LO-PWR; Categorylogic logic; File Size237KB，22 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74AUP1G3208GM,132 Overview

Logic Gates 1.8V 1G LO-PWR

74AUP1G3208GM,132 Parametric

Parameter Name	Attribute value
Brand Name	NXP Semiconductor
Is it Rohs certified?	conform to
Parts packaging code	SON
package instruction	1 X 1.45 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-252, SOT-886, SON-6
Contacts	6
Manufacturer packaging code	SOT886
Reach Compliance Code	compliant
series	AUP/ULP/V
JESD-30 code	R-PDSO-N6
JESD-609 code	e3
length	1.45 mm
Load capacitance (CL)	30 pF
Logic integrated circuit type	OR-AND GATE
MaximumI(ol)	0.0017 A
Humidity sensitivity level	1
Number of functions	1
Number of entries	3
Number of terminals	6
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	VSON
Encapsulate equivalent code	SOLCC6,.04,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260
power supply	1.2/3.3 V
Prop。Delay @ Nom-Sup	20.1 ns
propagation delay (tpd)	20.1 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	0.5 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	0.8 V
Nominal supply voltage (Vsup)	1.1 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Tin (Sn)
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	1 mm
Base Number Matches	1

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74AUP1G3208

Rev. 7 — 7 March 2017

Low-power 3-input OR-AND gate

Product data sheet

General description

The 74AUP1G3208 provides the Boolean function: Y = (A + B) × C. The user can choose

the logic functions OR, AND and OR-AND. All inputs can be connected to V

or GND.

Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall

times across the entire V

range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire

range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using I

OFF

. The I

OFF

circuitry disables the output, preventing the damaging backflow current through the

device when it is powered down.

Features and benefits

•

Wide supply voltage range from 0.8 V to 3.6 V

•

High noise immunity

•

Complies with JEDEC standards:

–

JESD8-12 (0.8 V to 1.3 V)

–

JESD8-11 (0.9 V to 1.65 V)

–

JESD8-7 (1.2 V to 1.95 V)

–

JESD8-5 (1.8 V to 2.7 V)

–

JESD8-B (2.7 V to 3.6 V)

•

ESD protection:

–

HBM JESD22-A114F Class 3A exceeds 5000 V

–

MM JESD22-A115-A exceeds 200 V

–

CDM JESD22-C101E exceeds 1000 V

•

Low static power consumption; I

= 0.9 μA (maximum)

•

Latch-up performance exceeds 100 mA per JESD 78 Class II

•

Inputs accept voltages up to 3.6 V

•

Low noise overshoot and undershoot < 10 % of V

•

OFF

circuitry provides partial Power-down mode operation

•

Multiple package options

•

Specified from -40 °C to +85 °C and -40 °C to +125 °C

74AUP1G3208GM,132 Related Products

	74AUP1G3208GM,132	74AUP1G3208GM,115
Description	Logic Gates 1.8V 1G LO-PWR	Logic Gates 1.8V SINGLE SCHMITT
Brand Name	NXP Semiconductor	NXP Semiconductor
Is it Rohs certified?	conform to	conform to
Parts packaging code	SON	SON
package instruction	1 X 1.45 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-252, SOT-886, SON-6	1 X 1.45 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-252, SOT-886, SON-6
Contacts	6	6
Manufacturer packaging code	SOT886	SOT886
Reach Compliance Code	compliant	compliant
series	AUP/ULP/V	AUP/ULP/V
JESD-30 code	R-PDSO-N6	R-PDSO-N6
JESD-609 code	e3	e3
length	1.45 mm	1.45 mm
Load capacitance (CL)	30 pF	30 pF
Logic integrated circuit type	OR-AND GATE	OR-AND GATE
MaximumI(ol)	0.0017 A	0.0017 A
Humidity sensitivity level	1	1
Number of functions	1	1
Number of entries	3	3
Number of terminals	6	6
Maximum operating temperature	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	VSON	VSON
Encapsulate equivalent code	SOLCC6,.04,20	SOLCC6,.04,20
Package shape	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, VERY THIN PROFILE
method of packing	TAPE AND REEL	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260	260
power supply	1.2/3.3 V	1.2/3.3 V
Prop。Delay @ Nom-Sup	20.1 ns	20.1 ns
propagation delay (tpd)	20.1 ns	20.1 ns
Certification status	Not Qualified	Not Qualified
Schmitt trigger	NO	NO
Maximum seat height	0.5 mm	0.5 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V
Minimum supply voltage (Vsup)	0.8 V	0.8 V
Nominal supply voltage (Vsup)	1.1 V	1.1 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	Tin (Sn)	Tin (Sn)
Terminal form	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.5 mm
Terminal location	DUAL	DUAL
Maximum time at peak reflow temperature	30	30
width	1 mm	1 mm
Base Number Matches	1	1

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