SY89228U
1GHz Precision, LVPECL ÷3, ÷5 Clock Divider
with Fail-Safe Input and Internal Termination
General Description
The SY89228U is a precision, low jitter 1GHz
÷3, ÷5
clock divider with an LVPECL output. A unique Fail-
Safe Input (FSI) protection prevents metastable
output conditions when the input clock voltage swing
drops significantly below 100mV or input is removed.
The differential input includes Micrel’s unique, 3-pin
internal termination architecture that allows the input
to interface to any differential signal (AC- or DC-
coupled) as small as 100mV (200mV
PP
) without any
level shifting or termination resistor networks in the
signal path. The outputs are 800mV, 100K-
compatible LVPECL with fast rise/fall times
guaranteed to be less than 270ps.
The SY89228U operates from a 2.5V ±5% or 3.3V
±10% supply and is guaranteed over the full
industrial temperature range of –40°C to +85°C. The
SY89228U is part of Micrel’s high-speed, Precision
®
Edge product line.
All support documentation can be found on Micrel’s
web site at:
www.micrel.com.
Precision Edge
®
Features
•
Accepts a high-speed input and provides a precision
÷3
and
÷5
sub-rate, LVPECL output
•
Fail-Safe Input
– Prevents oscillations when input is invalid
•
Guaranteed AC performance over temperature and
supply voltage:
– DC-to >1.0GHz throughput
– < 1500ps Propagation Delay (In-to-Q)
– < 270ps Rise/Fall times
•
Ultra-low jitter design:
– <1ps
RMS
random jitter
– <1ps
RMS
cycle-to-cycle jitter
– <10ps
PP
total jitter (clock)
– <0.7ps
RMS
MUX crosstalk induced jitter
•
Unique patented internal termination and VT pin
accepts DC- and AC-coupled inputs (CML, PECL,
LVDS)
•
Wide input voltage range VCC to GND
•
800mV LVPECL output
•
46% to 54% Duty Cycle(÷ 3)
•
47% to 53% Duty Cycle(÷ 5)
•
2.5V ±5% or 3.3V ±10% supply voltage
•
-40°C to +85°C industrial temperature range
•
Available in 16-pin (3mm x 3mm) QFN package
Block Diagram
Applications
•
Fail-safe clock protection
Markets
•
•
•
•
United States Patent No. RE44,134
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
LAN/WAN
Enterprise servers
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Test and measurement
August 2007
M9999-080707-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89228U
Ordering Information
(1)
Part Number
SY89228UMG
SY89228UMGTR
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals Only.
2. Tape and Reel.
(2)
Package
Type
QFN-16
QFN-16
Operating
Range
Industrial
Industrial
Package Marking
228U with
Pb-Free bar-line Indicator
228U with
Pb-Free bar-line Indicator
Lead
Finish
NiPdAu
Pb-Free
NiPdAu
Pb-Free
Pin Configuration
16-Pin QFN
August 2007
2
M9999-080707-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89228U
Pin Description
Pin Number
Pin Name
Pin Function
Differential Input: This input pair is the differential signal input to the device, which
accepts AC- or DC-coupled signal as small as 100mV. The input internally terminates
to a VT pin through 50Ω
and has level shifting resistors of 3.72 kΩ
to VCC. This
allows a wide input voltage range from VCC to GND. See Figure 3a, Simplified
Differential Input Stage for details. Note that this input will default to a valid (either
HIGH or LOW) state if left open. See “Input Interface Applications” subsection.
Input Termination Center-Tap: Each side of the differential input pair terminates to
the VT pin. The VT pin provides a center-tap for the input (IN, /IN) to a termination
network for maximum interface flexibility. See “Input Interface Applications”
subsection for more details.
Reference Voltage: This output biases to V
CC
–1.2V. It is used for AC-coupling inputs
IN and /IN. Connect VREF-AC directly to the VT pin. Bypass with 0.01µF low ESR
capacitor to VCC. Due to limited drive capability, the VREF-AC pin is only intended to
drive its respective VT pin. Maximum sink/source current is ±0.5mA. See “Input
Interface Applications” subsection.
Single-ended Input: This TTL/CMOS-compatible input disables and enables the
output. It is internally connected to a 25kΩ pull-up resistor and will default to a logic
HIGH state if left open. When disabled, Q goes LOW and /Q goes HIGH. EN being
synchronous, outputs will be enabled/disabled after a rising and a falling edge of the
input clock. V
TH
= V
CC
/2.
Single-ended Input: This TTL/CMOS-compatible input, when pulled LOW,
asynchronously sets Q output LOW and /Q output HIGH. Note that this input is
internally connected to a 25kΩ pull-up resistor and will default to logic HIGH state if
left open. V
TH
= V
CC
/2.
No Connect
Positive Power Supply: Bypass with 0.1µF in parallel with 0.01µF low ESR capacitors
as close to the V
CC
pins as possible.
Differential Output: The LVPECL output swing is typically 800mV and is terminated
with 50Ω
to V
CC
-2V. See the “Truth Table” below for the logic function.
Ground: Ground and exposed pad must be connected to a ground plane that is the
same potential as the ground pins.
Single-ended Input: This TTL/CMOS-compatible input selects divide-by-3 when
pulled LOW and divide-by-5 when pulled HIGH. Note that this input is internally
connected to a 25kΩ pull-up resistor and will default to logic HIGH state if left open.
V
TH
= V
CC
/2.
1, 4
IN, /IN
2
VT
3
VREF-AC
5
EN
6
7
8, 13
12, 9
10, 11, 14,15
/MR
NC
VCC
Q, /Q
GND,
Exposed Pad
DIV_SEL
16
Truth Table
Inputs
DIV_SEL
X
0
1
X
EN
X
1
1
0
/MR
0
1
1
1
Outputs
Q
0
/Q
1
÷
3
÷
5
0
÷
3
÷
5
1
August 2007
3
M9999-080707-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89228U
Absolute Maximum Ratings
(1)
Supply Voltage (V
CC
) .......................... –0.5V to +4.0V
Input Voltage (V
IN
) ..................................–0.5V to V
CC
LVPECL Output Current (I
OUT
) ....................................
Continuous ................................................. 50mA
Surge ........................................................ 100mA
Current (V
T
)
Source or sink current on V
T
pin…………±100mA
Input Current
Source or sink current on (IN, /IN) ........... ±50mA
Current (V
REF-AC
)
(4)
Source/Sink Current on V
REF-AC
............ ±0.5mA
Maximum Operating Junction Temperature…..125°C
Lead Temperature (soldering, 20 sec.) .......... +260°C
Storage Temperature (T
s
) ..................–65°C to 150°C
Operating Ratings
(2)
Supply Voltage (V
CC
).................. +2.375V to +2.625V
......................................................+3.0V to +3.6V
Ambient Temperature (T
A
) ................ –40°C to +85°C
(3)
Package Thermal Resistance
QFN (θ
JA
)
Still-Air ..................................................... 75°C/W
QFN (ψ
JB
)
Junction-to-Board………………………….33°C/W
DC Electrical Characteristics
(5)
T
A
= –40°C to +85°C, unless otherwise stated.
Symbol
V
CC
I
CC
R
IN
R
DIFF_IN
V
IH
V
IL
V
IN
V
DIFF_IN
V
IN_FSI
V
REF-AC
V
T_IN
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is
not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
θ
JA
and
ψ
JB
values are determined for a 4-layer board in still air unless otherwise stated.
4. Due to limited drive capability use for input of the same package only.
5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
6. V
IN
(max) is specified when V
T
is floating.
Parameter
Power Supply
Power Supply Current
Input Resistance
(IN-to-V
T
)
Differential Input Resistance
(IN-to-/IN)
Input High Voltage
(IN, /IN)
Input Low Voltage
(IN, /IN)
Input Voltage Swing
(IN, /IN)
Differential Input Voltage Swing
|IN-/IN|
Input Voltage Threshold that
Triggers FSI
Output Reference Voltage
Voltage from Input to V
T
Condition
Min
2.375
3.0
Typ
2.5
3.3
40
50
100
Max
2.625
3.6
55
55
110
V
CC
V
IH
–0.1
V
CC
Units
V
V
mA
Ω
Ω
V
V
V
V
No load, max V
CC
45
90
1.2
0
See Figure 2a. Note 6.
See Figure 2b.
0.1
0.2
30
V
CC
–1.3
V
CC
–1.2
100
V
CC
–1.1
1.8
mV
V
V
August 2007
4
M9999-080707-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SY89228U
LVPECL Outputs DC Electrical Characteristics
(7)
V
CC
= 2.5V ±5% or 3.3V ±10%; R
L
= 50Ω
to V
CC
-2V; T
A
= –40°C to + 85°C, unless otherwise stated.
Symbol
V
OH
V
OL
V
OUT
V
DIFF_OUT
Parameter
Output HIGH Voltage
Q, /Q
Output LOW Voltage
Q, /Q
Output Voltage Swing
Q, /Q
Differential Output Voltage Swing
Q, /Q
See Figure 2a.
See Figure 2b.
Condition
Min
V
CC
-1.145
V
CC
-1.945
550
1100
800
1600
Typ
Max
V
CC
-0.895
V
CC
-1.695
950
Units
V
V
mV
mV
LVTTL/CMOS DC Electrical Characteristics
(7)
V
CC
= 2.5V ±5% or 3.3V ±10%; T
A
= –40°C to + 85°C, unless otherwise stated.
Symbol
V
IH
V
IL
I
IH
I
IL
Note:
7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
Parameter
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Condition
Min
2.0
Typ
Max
0.8
Units
V
V
µA
µA
-125
-300
30
August 2007
5
M9999-080707-A
hbwhelp@micrel.com
or (408) 955-1690
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