MC12026A
1.1 GHz Dual Modulus
Prescaler
Description
The MC12026A is a high frequency, low voltage dual modulus
prescaler used in phase-locked loop (PLL) applications.
The MC12026A can be used with CMOS synthesizers requiring
positive edges to trigger internal counters in a PLL to provide tuning
signals up to 1.1 GHz in programmable frequency steps.
A Divide Ratio Control (SW) permits selection of an 8/9 or 16/17
divide ratio as desired.
The Modulus Control (MC) selects the proper divide number after
SW has been biased to select the desired divide ratio.
Features
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8
1
SOIC−8 NB
D SUFFIX
CASE
751−07
•
•
•
•
•
•
•
1.1 GHz Toggle Frequency
Supply Voltage 4.5 to 5.5 V
Low Power 4.0 mA Typical
Operating Temperature Range of
−40
to 85°C
The MC12026 is Pin Compatible with the MC12022
Short Setup Time (t
set
) 6.0 ns Typical @ 1.1 GHz
Modulus Control Input Level is Compatible with Standard CMOS
and TTL
•
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
Table 1. FUNCTIONAL TABLE
SW
H
H
L
L
MC
H
L
H
L
Divide Ratio
8
9
16
17
MARKING DIAGRAM*
8
026A
ALYW
G
1
A
L
Y
W
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note
AND8002/D.
PIN CONNECTIONS
IN
V
CC
SW
OUT
1
2
3
4
8
7
6
5
1. SW: H = V
CC
, L = Open. A logic L can also be applied by grounding this pin,
but this is not recommended due to increased power consumption.
2. MC: H = 2.0 V to V
CC
, L = GND to 0.8 V.
Table 2. MAXIMUM RATINGS
Characteristics
Power Supply Voltage, Pin 2
Operating Temperature Range
Storage Temperature Range
Modulus Control Input, Pin 6
Maximum Output Current, Pin 4
Symbol
V
CC
T
A
T
stg
MC
I
O
Value
−0.5
to 7.0
−40
to 85
−65
to 150
−0.5
to 6.5
10.0
Unit
Vdc
°C
°C
Vdc
mA
IN
NC
MC
GND
(Top View)
ORDERING INFORMATION
Device
MC12026ADG
MC12026ADR2G
Package
SOIC−8 NB
(Pb-Free)
SOIC−8 NB
(Pb-Free)
Shipping
†
98 Units/Tube
2500/Tape & Reel
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
NOTE: ESD data available upon request.
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure,
BRD8011/D.
©
Semiconductor Components Industries, LLC, 2016
August, 2016
−
Rev. 9
1
Publication Order Number:
MC12026A/D
MC12026A
Table 3. ELECTRICAL CHARACTERISTICS
(V
CC
= 4.5 to 5.5; T
A
=
−40
to 85°C, unless otherwise noted.)
Characteristic
Toggle Frequency (Sin Wave)
Supply Current Output Unloaded (Pin 2)
Modulus Control Input High (MC)
Modulus Control Input Low (MC)
Divide Ratio Control Input High (SW)
Divide Ratio Control Input Low (SW)
Output Voltage Swing
(R
L
= 560
W;
I
O
= 5.5 mA) (Note 1)
(R
L
= 1.1 kW; I
O
= 2.9 mA) (Note 2)
Modulus Setup Time MC to Out (Note 3)
Input Voltage Sensitivity
100−250 MHz
250−1100 MHz
1. Divide Ratio of
÷8/9
at 1.1 GHz, C
L
= 8.0 pF.
2. Divide Ratio of
÷16/17
at 1.1 GHz, C
L
= 8.0 pF.
3. Assuming R
L
= 560
W
at 1.1 GHz.
Symbol
f
t
I
CC
V
IH1
V
IL1
V
IH2
V
IL2
V
out
Min
0.1
−
2.0
GND
V
CC
−
0.5 V
OPEN
1.0
Typ
1.4
4.0
−
−
V
CC
OPEN
1.6
Max
1.1
5.3
V
CC
0.8
V
CC
+ 0.5 V
OPEN
−
Unit
GHz
mA
V
V
V
−
V
pp
t
SET
V
in
−
400
100
6.0
−
−
9.0
1000
1000
ns
mVpp
D
In
In
MC
C
Q
QB
D
C
Q
QB
D
Q
QB
C M
1
D
0
C
SW
Q
C
Q
Out
QB
D QB
Figure 1. Logic Diagram (MC12026A)
Prop. Delay
In
Out
MC Setup
MC Release
Modulus setup time MC to out is the MC
setup or MC release plus the prop delay.
MC
Figure 2. Modulus Setup Time
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2
Embedded System
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