INTEGRATED CIRCUITS
GTL2005
Quad GTL/GTL+ to LVTTL/TTL
bidirectional non-latched translator
Product specification
Supersedes data of 1999 Jun 23
1999 Sep 17
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad GTL/GTL+ to LVTTL/TTL
bidirectional non-latched translator
GTL2005
FEATURES
•
Operates as a quad GTL/GTL+ sampling receiver or as a
•
Quad bidirectional bus interface
•
Live insertion/extraction permitted
•
Latch-up protection exceeds 500 mA per JESD78
•
ESD protection exceeds 2000 V HBM per JESD22-A114, and
1000 V CDM per JESD22-CC101
LVTTL/TTL to GTL/GTL+ driver
PIN CONFIGURATION
DIR 1
A0 2
A1 3
GTLREF 4
A2 5
A3 6
14 V
CC
13 B0
12 B1
11 GND
10 B2
9 B3
8 GND
DESCRIPTION
The GTL2005 is a quad translating transceiver designed for 3.3 V
system interface with a GTL/GTL
+
bus.
The direction pin allows the part to function as either a GTL to TTL
sampling receiver or as a TTL to GTL interface.
GND 7
SW00321
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
I/O
PARAMETER
Propagation delay
An to Bn or Bn to An
Input capacitance DIR
I/O pin capacitance
CONDITIONS
T
amb
= 25°C
C
L
= 50 pF; V
CC
= 3.3 V
V
I
= 0 V or V
CC
Outputs disabled; V
I/O
= 0 V or 3.0 V
TYPICAL
B to A
A to B
2.1
1.9
3.0
7.8
4.1
4.3
3.0
4.5
UNIT
ns
pF
pF
ORDERING INFORMATION
PACKAGES
14-Pin Plastic TSSOP Type II
TEMPERATURE RANGE
–40°C to +85°C
ORDER CODE
GTL2005 PW DH
DWG NUMBER
SOT402-1
PIN DESCRIPTION
PIN NUMBER
1
2, 3, 5, 6
13, 12, 10, 9
4
7, 8, 11
14
SYMBOL
DIR
A0 – A3
B0 – B3
GTLREF
GND
V
CC
NAME AND FUNCTION
Direction control input
Data inputs/outputs (A side, GTL)
Data inputs/outputs (B side, TTL)
GTL reference voltage
Ground (0 V)
Positive supply voltage
LOGIC SYMBOL
A0
B0
A1
B1
A2
B2
FUNCTION TABLE
INPUT
DIR
H
L
B
Inputs
An = Bn
INPUT/OUTPUT
A
Bn = An
Inputs
GTLREF
DIR
A3
B3
SW00320
H = HIGH voltage level
L = LOW voltage level
1999 Sep 17
2
853–2171 22353
Philips Semiconductors
Product specification
Quad GTL/GTL+ to LVTTL/TTL
bidirectional non-latched translator
GTL2005
ABSOLUTE MAXIMUM RATINGS
1
In accordance with the Absolute Maximum System (IEC 134); voltages are referenced to GND (ground = 0 V).
SYMBOL
V
CC
I
IK
V
I
I
OK
V
O
I
O
OL
I
OH
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
DC output voltage
3
Current into any output in the LOW state
Current into any output in the HIGH state
Storage temperature range
V
I
<
0
A port
B port
V
O
<
0
Output in Off or High state; A port
Output in Off or High state; B port
A port
B port
A port
TEST CONDITIONS
RATING
–0.5 to +4.6
–50
–0.5 to +7.0
–0.5 to +4.6
–50
–0.5 to +7.0
–0.5 to +4.6
128
80
–64
–60 to +150
UNIT
V
mA
V
V
mA
V
V
mA
mA
mA
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “Recommended Operating Conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
1
SYMBOL
V
CC
V
TT
V
REF
V
I
V
IH
V
IL
I
OH
I
O
OL
T
amb
PARAMETER
Supply voltage
Termination voltage
Supply voltage
Input voltage
HIGH-level
HIGH level input voltage
LOW-level
LOW level input voltage
HIGH-level output current
LOW-level
LOW level output current
Operating free-air temperature range
GTL
GTL+
GTL
GTL+
A port
Except A port
A port
Except A port
A port
Except A port
B port
A port
B port
–40
TEST CONDITIONS
MIN
0
1.14
1.35
0.74
0.87
0
0
V
REF
+ 50 mV
2
V
REF
– 50 mV
0.8
–12
40
12
85
1.2
1.5
0.8
1.0
0
TYP
MAX
3.6
1.26
1.65
0.87
1.10
V
TT
5.5
UNIT
V
V
V
V
V
V
mA
mA
mA
°C
NOTE:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
1999 Sep 17
3
Philips Semiconductors
Product specification
Quad GTL/GTL+ to LVTTL/TTL
bidirectional non-latched translator
GTL2005
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
V
O
OH
V
O
OL
B port
A port
B port
Control inputs
A port
I
I
B port
I
OFF
I
EX
I
CC
∆I
CC3
C
I
C
IO
O
A port
B port
A or B port
B port or control inputs
Control inputs
B port
A port
V
CC
= 3.0 to 3.6 V
;
I
OH
= –100
µA
V
CC
= 3.0 V
;
I
OH
= –12 mA
V
CC
= 3.0 V
;
I
OL
= 40 mA
V
CC
= 3.0 V
;
I
OL
= 12 mA
V
CC
= 3.6 V; V
I
= V
CC
or GND
V
CC
= 3.6 V; V
I
= V
TT
or GND
V
CC
= 0 or 3.6 V; V
I
= 5.5
V
CC
= 3.6 V; V
I
= V
CC
V
CC
= 3.6 V; V
I
= 0 V
V
CC
= 0 V;V
I
or V
O
= 0 to 4.5 V
V
O
= 5.5 V; V
CC
= 3.0 V
V
CC
= 3.6 V;V
I
= V
CC
or GND; I
O
= 0
V
CC
= 3.6 V; V
I
= V
CC
–0.6 V
V
I
= 3.0 V or 0
V
O
= 3.0 V or 0
V
O
= V
TT
or 0
3
7.8
4.5
50
V
CC
–0.2
2.0
0.4
0.8
±
1
±
1
10
±
1
–5
±
100
125
3
500
µA
µA
mA
µA
pF
pF
µA
–40°C to +85°C
TYP
1
MAX
V
V
V
UNIT
NOTES:
1. All typical values are measured at V
CC
= 3.3 V and T
amb
= 25°C.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
3. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC or GND.
AC CHARACTERISTICS (3.3 V
"0.3
V RANGE)
LIMITS (GTL)
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 3.3 V
"0.3
V
V
REF
= 0.8 V
MIN
t
PLH
t
PHL
Bn to An
1
TYP
1
2.1
1.9
4.1
4.4
MAX
2.3
2.6
5.4
5.4
LIMITS (GTL+)
V
CC
= 3.3 V
"0.3
V
V
REF
= 1.0 V
MIN
TYP
1
2.1
1.9
4.2
3.8
MAX
2.3
2.6
5.3
4.8
ns
ns
UNIT
t
PLH
An to Bn
2
t
PHL
NOTES:
1. All typical values are at V
CC
= 3.3 V and T
amb
= 25°C.
1999 Sep 17
4
Philips Semiconductors
Product specification
Quad GTL/GTL+ to LVTTL/TTL
bidirectional non-latched translator
GTL2005
AC WAVEFORMS
V
M
= 1.5 V at V
CC
w
3.0 V, V
M
= V
CC
/2 at V
CC
v
2.7 V for B ports and control pins
V
M
= V
Ref
for A ports
t
PLH
3.0V
V
M
V
V
M
V
0V
VOLTAGE WAVEFORMS PULSE DURATION
V
M
= 1.5V for B port and 0.8V for A port
Output
3.0V
Input
V
OL
1.5V
1.5V
0V
t
PLH
t
PHL
V
OH
Output
V
REF
V
REF
V
OL
VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES
B port to A port
PRR
≤
10MHz, Z
O
= 50Ω, t
r
≤
2.5ns, t
f
≤
2.5ns.
1.5V
1.5V
t
PLH
t
PHL
V
OH
Input
V
REF
V
REF
0V
3.0
SW00469
Waveform 2.
SW00470
Waveform 1.
TEST CIRCUIT
V
CC
V
CC
V
O
D.U.T.
50pF
V
TT
V
I
PULSE
GENERATOR
R
T
25Ω
V
I
R
L
= 500Ω
PULSE
GENERATOR
R
T
D.U.T.
C
L
30pF
V
O
C
L
Test Circuit for switching times
DEFINITIONS
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitance
R
T
= Termination resistance should be equal to Z
OUT
of pulse generators.
SW00332
Figure 2. Load circuit for A outputs
SW00471
Figure 1. Load circuitry for switching times
1999 Sep 17
5
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