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74AHCT257D-T

Description
Encoders, Decoders, Multiplexers & Demultiplexers 8-BIT ADDRSSBL LATCH
Categorylogic    logic   
File Size84KB,17 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
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74AHCT257D-T Overview

Encoders, Decoders, Multiplexers & Demultiplexers 8-BIT ADDRSSBL LATCH

74AHCT257D-T Parametric

Parameter NameAttribute value
Source Url Status Check Date2013-06-14 00:00:00
Is it Rohs certified?conform to
MakerNXP
Parts packaging codeSOIC
package instructionSOP, SOP16,.25
Contacts16
Reach Compliance Codeunknown
seriesAHCT/VHCT/VT
JESD-30 codeR-PDSO-G16
JESD-609 codee4
length9.9 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeMULTIPLEXER
MaximumI(ol)0.008 A
Humidity sensitivity level1
Number of functions4
Number of entries2
Output times1
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply5 V
Prop。Delay @ Nom-Sup11 ns
propagation delay (tpd)13.5 ns
Certification statusNot Qualified
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3.9 mm
Base Number Matches1
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
Rev. 02 — 9 May 2008
Product data sheet
1. General description
The 74AHC257; 74AHCT257 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7-A.
The 74AHC257; 74AHCT257 has four identical 2-input multiplexers with 3-state outputs,
which select 4 bits of data from two sources and are controlled by a common data select
input (S). The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and
the data inputs from source 1 (1I1 to 4I1) are selected when input S is HIGH. Data
appears at the outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs.
The 74AHC257; 74AHCT257 is the logic implementation of a 4-pole 2-position switch,
where the position of the switch is determined by the logic levels applied to input S. The
outputs are forced to a high-impedance OFF-state when OE is HIGH.
The logic equations for the outputs are:
1Y = OE
×
(1I1
×
S + 1I0
×
S)
2Y = OE
×
(2I1
×
S + 2I0
×
S)
3Y = OE
×
(3I1
×
S + 3I0
×
S)
4Y = OE
×
(4I1
×
S + 4I0
×
S)
The 74AHC257; 74AHCT257 is identical to the 74AHC258; 74AHCT258, but has
non-inverting (true) outputs.
2. Features
I
I
I
I
I
Balanced propagation delays
All inputs have Schmitt-trigger actions
Non-inverting data path
Inputs accept voltages higher than V
CC
Input levels:
N
For 74AHC257: CMOS level
N
For 74AHCT257: TTL level
I
ESD protection:
N
HBM EIA/JESD22-A114E exceeds 2000 V
N
MM EIA/JESD22-A115-A exceeds 200 V
N
CDM EIA/JESD22-C101C exceeds 1000 V
I
Multiple package options
I
Specified from
−40 °C
to +85
°C
and from
−40 °C
to +125
°C

74AHCT257D-T Related Products

74AHCT257D-T 74AHCT257PW-T 74AHC257PWDH-T
Description Encoders, Decoders, Multiplexers & Demultiplexers 8-BIT ADDRSSBL LATCH Encoders, Decoders, Multiplexers & Demultiplexers 8-BIT ADDRSSBL LATCH Encoders, Decoders, Multiplexers & Demultiplexers QUAD 2-INPUT MULTIPLEXER
Source Url Status Check Date 2013-06-14 00:00:00 2013-06-14 00:00:00 2013-06-14 00:00:00
Is it Rohs certified? conform to conform to conform to
Maker NXP NXP NXP
Parts packaging code SOIC TSSOP TSSOP
package instruction SOP, SOP16,.25 TSSOP, TSSOP16,.25 TSSOP, TSSOP16,.25
Contacts 16 16 16
Reach Compliance Code unknown unknown unknown
series AHCT/VHCT/VT AHCT/VHCT/VT AHC
JESD-30 code R-PDSO-G16 R-PDSO-G16 R-PDSO-G16
JESD-609 code e4 e4 e4
length 9.9 mm 5 mm 5 mm
Load capacitance (CL) 50 pF 50 pF 50 pF
Logic integrated circuit type MULTIPLEXER MULTIPLEXER MULTIPLEXER
MaximumI(ol) 0.008 A 0.008 A 0.008 A
Number of functions 4 4 4
Number of entries 2 2 2
Output times 1 1 1
Number of terminals 16 16 16
Maximum operating temperature 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C
Output characteristics 3-STATE 3-STATE 3-STATE
Output polarity TRUE TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP TSSOP TSSOP
Encapsulate equivalent code SOP16,.25 TSSOP16,.25 TSSOP16,.25
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing TAPE AND REEL TAPE AND REEL TAPE AND REEL
Peak Reflow Temperature (Celsius) 260 260 NOT SPECIFIED
power supply 5 V 5 V 2/5.5 V
propagation delay (tpd) 13.5 ns 13.5 ns 16 ns
Certification status Not Qualified Not Qualified Not Qualified
Maximum seat height 1.75 mm 1.1 mm 1.1 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 2 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal surface NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD
Terminal form GULL WING GULL WING GULL WING
Terminal pitch 1.27 mm 0.65 mm 0.65 mm
Terminal location DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 30 NOT SPECIFIED
width 3.9 mm 4.4 mm 4.4 mm
Base Number Matches 1 1 1
Humidity sensitivity level 1 1 -
Prop。Delay @ Nom-Sup 11 ns 11 ns -
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