End of Life. Last Available Purchase Date is 31-Dec-2014
Si9110/9111
Vishay Siliconix
High-Voltage Switchmode Controllers
FEATURES
10- to 120-V Input Range
Current-Mode Control
High-Speed, Source-Sink Output Drive
High Efficiency Operation (> 80%)
Internal Start-Up Circuit
Internal Oscillator (1 MHz)
SHUTDOWN and RESET
Reference Selection
Si9110 − 1%
Si9111 − 10%
DESCRIPTION
The Si9110/9111 are BiC/DMOS integrated circuits designed
for use as high-performance switchmode controllers. A
high-voltage DMOS input allows the controller to work over a
wide range of input voltages (10- to 120-VDC). Current-mode
PWM control circuitry is implemented in CMOS to reduce
internal power consumption to less than 10 mW.
A push-pull output driver provides high-speed switching for
MOSPOWER devices large enough to supply 50 W of output
power. When combined with an output MOSFET and
transformer, the Si9110/9111 can be used to implement
single-ended power converter topologies (i.e., flyback,
forward, and cuk).
The Si9110/9111 are available in both standard and
lead (Pb)-free 14-pin plastic DIP and SOIC packages which
are specified to operate over the industrial temperature range
of −40 C to 85 C.
FUNCTIONAL BLOCK DIAGRAM
OSC
IN
8
OSC
OUT
7
FB
14
COMP
DISCHARGE
13
9
Error
Amplifier
10
−
+
4V
Ref
Gen
2V
−
+
+
−
1
BIAS
6
Current
Sources
To
Internal
Circuits
1.2 V
C/L
Comparator
OSC
Clock (
1
/
2
f
OSC
)
V
REF
To
V
CC
Current-Mode
Comparator
R
Q
S
4
5
OUTPUT
−V
IN
3
V
CC
SENSE
V
CC
+V
IN
2
8.1 V
−
+
8.6 V
−
+
Undervoltage
Comparator
Q
S
R
11
12
SHUTDOWN
RESET
Pre-Regulator/Start-Up
Document Number: 70004
S-42037—Rev. H, 15-Nov-04
www.vishay.com
1
Si9110/9111
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to
−V
IN
(Note: V
CC
< +V
IN
+ 0.3 V)
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
+V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 V
Logic Inputs (RESET,
SHUTDOWN, OSC IN, OSC OUT) . . . . . . . . . . . . . . .
−0.3
V to V
CC
+ 0.3 V
Linear Inputs
(FEEDBACK, SENSE, BIAS, V
REF
) . . . . . . . . . . . . . . .
−0.3
V to V
CC
+ 0.3 V
HV Pre-Regulator Input Current (continuous) . . . . . . . . . . . . . . . . . . . . . 5 mA
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−65
to 150_C
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−40
to 85_C
Junction Temperature (T
J
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C
Power Dissipation (Package)a
14-Pin Plastic DIP (J Suffix)
b
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 750 mW
14-Pin SOIC (Y Suffix)
c
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW
Thermal Impedance (Q
JA
)
14-Pin Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167_C/W
14-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140_C/W
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 6 mW/_C above 25_C.
c. Derate 7.2 mW/_C above 25_C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Voltages Referenced to
−V
IN
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.5 V to 13.5 V
+V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 120 V
f
OSC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 kHz to 1 MHz
R
OSC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 kW to 1 MW
Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to V
CC
−
3 V
Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to V
CC
SPECIFICATIONS
a
Test Conditions
Unless Otherwise Specified
Parameter
Reference
Si9110
Output Voltage
V
R
OSC IN =
−
V
IN
(OSC Disabled)
R
L
= 10 MW
Si9111
Si9110
Si9111
Output
Impedance
e
Z
OUT
I
SREF
T
REF
V
REF
=
−V
IN
Short Circuit Current
Temperature Stability
e
Room
Room
Full
Full
Room
Room
Full
3.92
3.60
3.86
3.52
15
70
30
100
0.50
4.0
4.0
4.08
4.40
4.14
4.46
45
130
1.0
kW
mA
mV/_C
V
D Suffix
−40
to 85_C
Symbol
DISCHARGE =
−V
IN
= 0 V
V
V
CC
= 10 V, +V
IN
= 48 V
R
BIAS
= 390 kW , R
OSC
= 330 kW
Temp
b
Min
d
Typ
c
Max
d
Unit
Oscillator
Maximum Frequency
e
Initial Accuracy
Voltage Stability
Temperature Coefficient
e
f
MAX
f
OSC
Df/f
T
OSC
R
OSC
= 0
R
OSC
= 330 k, See Note f
R
OSC
= 150 k, See Note f
Df/f=f(13.5
V)
−
f(9.5 V)/ f(9.5 V)
Room
Room
Room
Room
Full
1
80
160
3
100
200
10
200
120
240
15
500
MHz
kHz
%
ppm/_C
Error Amplifier
Feedback Input Voltage
Input BIAS Current
Input OFFSET Voltage
Open Loop Voltage
Gain
e
Unity Gain Bandwidth
e
Dynamic Output Impedance
e
Output Current
Power Supply Rejection
www.vishay.com
V
FB
I
FB
V
OS
A
VOL
BW
Z
OUT
I
OUT
PSRR
Source (V
FB
= 3.4 V)
Sink (V
FB
= 4.5 V)
9.5 V
v
V
CC
v
13.5 V
OSC IN =
−
V
IN
(OSC Disabled)
FB Tied to COMP
OSC IN =
−
V
IN
(OSC Disabled)
OSC IN =
−
V
IN
, V
FB
= 4 V
Si9110
Si9111
Room
Room
Room
Room
Room
Room
Room
Room
Room
Room
0.12
50
60
1
3.96
3.60
4.00
4.00
25
"15
80
1.3
1000
−2.0
0.15
70
2000
−1.4
4.04
4.40
500
"40
V
nA
mV
dB
MHz
W
mA
dB
Document Number: 70004
S-42037—Rev. H, 15-Nov-04
2
Si9110/9111
Vishay Siliconix
SPECIFICATIONS
a
Test Conditions
Unless Otherwise Specified
Parameter
Current Limit
Threshold Voltage
Delay to Output
e
V
SOURCE
t
d
V
FB
= 0 V
V
SENSE
= 1.5 V, See Figure 1
Room
Room
1.0
1.2
100
1.4
150
V
ns
D Suffix
−40
to 85_C
Symbol
DISCHARGE =
−V
IN
= 0 V
V
CC
= 10 V, +V
IN
= 48 V
R
BIAS
= 390 kW , R
OSC
= 330 kW
Temp
b
Min
d
Typ
c
Max
d
Unit
Pre-Regulator/Start-Up
Input Voltage
Input Leakage Current
Pre-Regulator Start-Up Current
V
CC
Pre-Regulator Turn-Off
Threshold Voltage
Undervoltage Lockout
V
REG
−V
UVLO
+V
IN
+I
IN
I
START
V
REG
V
UVLO
V
DELTA
I
IN
= 10
mA
V
CC
w
9.4 V
Pulse Width
v
300
ms,
V
CC
= V
ULVO
I
PRE-REGULATOR
= 10
mA
Room
Room
Room
Room
Room
Room
8
7.8
7.0
0.3
15
8.6
8.1
0.6
9.4
8.9
V
120
10
V
mA
mA
Supply
Supply Current
Bias Current
I
CC
I
BIAS
C
LOAD
< 75 pF (Pin 4)
Room
Room
0.45
10
0.6
15
1.0
20
mA
mA
Logic
SHUTDOWN Delay
e
SHUTDOWN Pulse Width
e
RESET Pulse Width
e
Latching Pulse Width
SHUTDOWN and RESET Low
e
Input Low Voltage
Input High Voltage
Input Current Input Voltage High
Input Current Input Voltage Low
t
SD
t
SW
t
RW
t
LW
V
IL
V
IH
I
IH
I
IL
V
IN
= 10 V
V
IN
= 0 V
See Figure 3
C
L
= 500 pF, V
SENSE
−V
IN
, See Figure 2
See Figure 3
Room
Room
Room
Room
Room
Room
Room
Room
−35
8
1
−25
5
50
50
25
2.0
V
ns
50
100
mA
Output
Output High Voltage
Output Low Voltage
Output Resistance
Rise Time
e
Fall Time
e
V
OH
V
OL
R
OUT
t
r
t
f
I
OUT
=
−10
mA
I
OUT
= 10 mA
I
OUT
= 10 mA, Source or Sink
C
L
= 500 pF
Room
Full
Room
Full
Room
Full
Room
Room
20
25
40
40
9.7
9.5
0.30
0.50
30
50
75
75
V
W
ns
Notes
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
e. Guaranteed by design, not subject to production test.
f.
C
STRAY
Pin 8 =
v
5 pF.
Document Number: 70004
S-42037—Rev. H, 15-Nov-04
www.vishay.com
3
Si9110/9111
Vishay Siliconix
TIMING WAVEFORMS
1.5 V
−
SENSE
0
V
CC
OUTPUT
0
−
50%
t
d
t
r
v
10 ns
V
CC
SHUTDOWN
0
V
CC
OUTPUT
0
50%
−
t
SD
t
f
v
10 ns
90%
90%
−
FIGURE 1.
FIGURE 2.
V
CC
SHUTDOWN
0
V
CC
RESET
0
50%
−
50%
−
t
SW
50%
t
LW
50%
t
RW
50%
t
r
, t
f
v
10 ns
FIGURE 3.
TYPICAL CHARACTERISTICS
140
120
100
+V IN (V)
80
60
40
20
0
10
+V
IN
vs. +I
IN
at Start-Up
1M
V
CC
=
−V
IN
Output Switching Frequency vs.
Oscillator Resistance
f OUT (Hz)
100 k
10 k
15
+I
IN
(mA)
20
10 k
100 k
r
OSC
(W)
1M
FIGURE 4.
FIGURE 5.
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Document Number: 70004
S-42037—Rev. H, 15-Nov-04
Si9110/9111
Vishay Siliconix
PIN CONFIGURATIONS AND ORDERING INFORMATION
Dual-In-Line and SOIC
BIAS
+V
IN
SENSE
OUTPUT
−V
IN
V
CC
OSC OUT
1
2
3
4
5
6
7
Top View
14 FB
13 COMP
12 RESET
11 SHUTDOWN
10 V
REF
9
8
DISCHARGE
OSC IN
ORDERING INFORMATION
Part Number
Si9110DY
Si9110DY-T1
Si9110DY-T1—E3
Si9111DY
Si9111DY-T1
Si9111DY-T1—E3
Si9110DJ
Si9110DJ-—E3
Si9111DJ
Si9111DJ-—E3
PDIP-14
PDIP 14
−40
to 85_C
SOIC-14
Temperature Range
Package
DETAILED DESCRIPTION
Pre-Regulator/Start-Up Section
Due to the low quiescent current requirement of the
Si9110/9111 control circuitry, bias power can be supplied from
the unregulated input power source, from an external
regulated low-voltage supply, or from an auxiliary “bootstrap”
winding on the output inductor or transformer.
When power is first applied during start-up, +V
IN
(pin 2) will
draw a constant current. The magnitude of this current is
determined by a high-voltage depletion MOSFET device
which is connected between +V
IN
and V
CC
(pin 6). This
start-up circuitry provides initial power to the IC by charging an
external bypass capacitance connected to the V
CC
pin. The
constant current is disabled when V
CC
exceeds 8.6 V. If V
CC
is
not forced to exceed the 8.6-V threshold, then V
CC
will be
regulated to a nominal value of 8.6 V by the pre-regulator
circuit.
As the supply voltage rises toward the normal operating
conditions, an internal undervoltage (UV) lockout circuit keeps
the output driver disabled until V
CC
exceeds the undervoltage
lockout threshold (typically 8.1 V). This guarantees that the
control logic will be functioning properly and that sufficient
gate drive voltage is available before the MOSFET turns on.
The design of the IC is such that the undervoltage lockout
threshold will be at least 300 mV less than the pre-regulator
turn-off voltage. Power dissipation can be minimized by
providing an external power source to V
CC
such that the
constant current source is always disabled.
Note:
During start-up or when V
CC
drops below 8.6 V the
start-up circuit is capable of sourcing up to 20 mA. This may
lead to a high level of power dissipation in the IC (for a 48-V
input, approximately 1 W). Excessive start-up time caused by
external loading of the V
CC
supply can result in device
damage. Figure 6 gives the typical pre-regulator current at
BiC/DMOS as a function of input voltage.
BIAS
To properly set the bias for the Si9110/9111, a 390-kW resistor
should be tied from BIAS (pin 1) to
−V
IN
(pin 5). This
determines the magnitude of bias current in all of the analog
sections and the pull-up current for the SHUDOWN and
RESET pins. The current flowing in the bias resistor is
nominally 15
mA.
Reference Section
The reference section of the Si9110 consists of a temperature
compensated buried zener and trimmable divider network.
The output of the reference section is connected internally to
the non-inverting input of the error amplifier. Nominal reference
output voltage is 4 V. The trimming procedure that is used on
the Si9110 brings the output of the error amplifier (which is
configured for unity gain during trimming) to within
"1%
of 4 V.
This compensates for input offset voltage in the error amplifier.
The output impedance of the reference section has been
purposely made high so that a low impedance external voltage
source can be used to override the internal voltage source, if
desired, without otherwise altering the performance of the device.
Document Number: 70004
S-42037—Rev. H, 15-Nov-04
www.vishay.com
5
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