DSA 120X200LB
Schottky Diode Gen
2
High Performance Schottky Diode
Low Loss and Soft Recovery
Parallel Legs
V
RRM
=
200 V
I
DAV
= 2x 65 A
V
F
= 0.67 V
Part number
DSA120X200LB
A2
n.c.
A1
9
8
7
1
3 2
4
6 5
Preliminary data
Iso
la
to ted
he su
at rfa
sin ce
k
K2
K1
E72873
D1
6
5
4
7
8 = n/c
9
D2
3
2
1
Features / Advantages:
• Very low V
F
• Extremely low switching losses
• Low I
RM
values
• Improved thermal behaviour
• High reliability circuits operation
• Low voltage peaks for reduced
protection circuits
• Low noise switching
Applications:
• Rectifiers in switch mode power
supplies (SMPS)
• Free wheeling diode in low voltage
converters
Package:
SMPD
• Isolation Voltage: 3000 V~ (t = 1s)
• Industry convenient outline
• RoHS compliant
• Soldering pins for PCB mounting
• Backside: DCB ceramic
• Reduced weight
• Advanced power cycling
IXYS reserves the right to change limits, test conditions and dimensions.
Data according ot IEC 60747 and per semiconductor unless otherwise specified
20130613a
© 2013 IXYS All rights reserved
1-4
DSA 120X200LB
Schottky
Symbol
V
RSM
V
RRM
I
R
V
F
Definitions
max. non-repetitive rev. blocking voltage
max. repetitive reverse blocking voltage
reverse current, drain current
forward voltage drop
Ratings
Conditions
T
VJ
= 25°C
T
VJ
= 25°C
V
R
= 200 V
I
F
= 60 A
I
F
= 120 A
I
F
= 60 A
I
F
= 120 A
T
VJ
= 25°C
T
VJ
= 125°C
T
VJ
= 25°C
T
VJ
= 150°C
T
C
= 130°C
T
VJ
= 175°C
min.
typ.
max.
200
200
1
5
0.98
1.22
0.82
1.10
65
0.51
2.7
0.8
with thermal transfer paste
(IXYS test setup)
T
C
=
t = 10 ms; (50 Hz), sine; V
R
= 0 V
V
R
= 24 V; f = 1 MHz
25°C
395
T
VJ
= 45°C
T
VJ
= 25°C
1.05
1.25
185
700
V
V
mA
mA
V
V
V
V
A
V
mW
K/W
K/W
W
A
pF
I
FAV
V
F0
r
F
R
thJC
R
thJH
P
tot
I
FSM
C
J
avarage forward current
threshold voltage
slope resistance
thermal resistance junction to case
thermal resistance case to heatsink
total power dissipation
max. forward surge current
rectangular; d = 0.5
for power loss calculation only
IXYS reserves the right to change limits, test conditions and dimensions.
Data according ot IEC 60747 and per semiconductor unless otherwise specified
20130613a
© 2013 IXYS All rights reserved
2-4
DSA 120X200LB
Package SMPD
Symbol
I
RMS
T
stg
T
op
T
VJ
Weight
F
C
d
Spp/App
d
Spb/Apb
V
ISOL
mounting force with clip
creepage distance on surface /
striking distance through air
isolation voltage
Ratings
Conditions
wide pin
standard pin
-55
-55
-55
8.5
40
terminal to terminal
terminal to backside
t = 1 second
t = 1 minute
50/60 Hz; RMS; I
ISOL
< 1 mA
1.6
4.0
3000
2500
130
min.
typ.
max.
100
60
150
150
175
A
A
°C
°C
°C
g
N
mm
mm
V
V
Definitions
RMS current
storage temperature
opertation temperature
virtual junction temperature
~
Backside DCB
Part number
Date code
Assembly line
Data Matrix Code
Digits
1 to 19:
20 to 23:
24 to 25:
26 to 31:
32:
33 to 36:
Part #
Date Code
Assembly line
Lot #
Split Lot
Individual #
~
UL Logo
~
Part number
D
S
A
120
X
200
LB
= Diode
= Schottky Diode
= low V
F
= Current Rating [A]
= Parallel legs
= Reverse Voltage [V]
= SMPD-B
XXXXXXXXXX
yywwA
Pin 1 identifier
Ordering
Standard
Part Name
DSA120X200LB-TRR
DSA120X200LB
Marking on Product
DSA120X200LB-TRR
DSA120X200LB
Delivering Mode Base Qty Ordering Code
Tape&Reel
Blister
200
45
512873
Equivalent Circuits for Simulation
I
V
0
R
0
threshold voltage
slope resistance *
*
on die level
Schottky
0.51
2.7
T
VJ
= 175°C
V
0 max
R
0 max
V
mW
IXYS reserves the right to change limits, test conditions and dimensions.
Data according ot IEC 60747 and per semiconductor unless otherwise specified
20130613a
© 2013 IXYS All rights reserved
3-4
DSA 120X200LB
Outlines SMPD
A(8:1)
5,5
0,1
(6x) 1
0,05
2)
0
+ 0,15
2°
0,1
25
0,2
0,5
0,1
9
0,1
18
0,1
(3x) 2
0,05
2)
1)
seating plane
4
0,05
0,55
0,1
7
8
9
4,85
0,2
2
0,2
32,7
0,5
23
0,2
3)
0,05
6 5 4
3 2 1
Pin number
A
2,75
0,1
5,5
0,1
13,5
0,1
16,25
0,1
19
0,1
Notes:
1) potrusion may add 0.2 mm max. on each side
2) additional max. 0.05 mm per side by punching misalignement
or overlap of dam bar or bending compression
3) DCB area 10 to 50 µm convex;
position of DCB area in relation to plastic rim: ±25 µm
(measured 2 mm from Cu rim)
4) terminal plating: 0.2 - 1 µm Ni + 10 - 25 µm Sn (galv.)
cutting edges may be partially free of plating
D1
6
5
4
7
8 = n/c
9
D2
3
2
1
IXYS reserves the right to change limits, test conditions and dimensions.
Data according ot IEC 60747 and per semiconductor unless otherwise specified
20130613a
© 2013 IXYS All rights reserved
4-4
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