BL8531H
AFE FOR CCD/CIS SIGNAL PROCESSOR
GENERAL DESCRIPTION
The samsung analog front end(AFE) for CCD/CIS image signal is an integrated analog signal processor for color
image signal.
The AFE converts CCD/CIS output signal to digital data. The AFE includes three-channel CDS(Correlated
Double Sampling) circuit, PGA(Programmable Gain Amplifier), and 12-bit analog to digital converter with
reference generator.
A parallel data bus provides a simple interface to 8-bit microcontroller.
APPLICATIONS
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Color and B/W Scanner
Digital Copiers
Facsimile
General Purpose CCD/CIS imager
FETURES
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12-bit 6MSPS A/D Converter
Integrated Triple Correlated Double Sampler
3-Channel 2 MSPS Color Mode
Analog Programmble Gain Amplifier
Internal Voltage Reference
Wide clamp level controllability for CIS sensor
No Missing Code Guaranteed
Microcontroller-Compatible Control Interface
Operation by Single 5V Supply
CMOS Low Power Dissipation
KEY SPECIFICATION
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Resolution: 12-bit
Conversion Rate: 6 MHz(2 MHz*3)
Supply Voltage: 5 V
±
5%
Power Dissipation: 375 mW(Typical)
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AFE FOR CCD/CIS SIGNAL PROCESSOR
BL8531H
FUNCTIONAL BLOCK DIAGRAM
RED
CDS
PGA
REF
GREEN
INPUT OFFSET
REGISTER
CDS
PGA
MUX
ADC
D[11:0]
MPU
PORT
BLUE
CDS
PGA
GAIN
REGISTER
Ver 2.0 (Apr. 2002)
No responsibility is assumed by SEC for its use nor for any infringements of patents or other rights of third parties
that may result from its use. The content of this datasheet is subject to change without any notice.
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BL8531H
AFE FOR CCD/CIS SIGNAL PROCESSOR
CORE PIN DESCRIPTION
Name
VDDA1
VSSA1
VDDA2
VSSA2
VBB
VDDD
VSSD
REFT
REFB
VCOM
BGR
R_VIN
G_VIN
B_VIN
STRTLN
CDS1_CLK
CDS2_CLK
ADCCLK
CSB
WRB
RDB
OEB
D[11:0]/MPU[7:0]
AD[2:0]
MCTL1, MCTL2
EXT_MCTL
I/O Type
AP
AG
AP
AG
AG
DP
DG
AB
AB
AB
AB
AI
AI
AI
DI
DI
DI
DI
DI
DI
DI
DI
DB
DI
DI
DI
I/O Pad
vdda
vssa
vdda
vssa
vbba
vddd
vssd
piar50_bb
piar50_bb
piar50_bb
piar50_bb
piar10_bb
piar10_bb
piar10_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
picc_bb
pia_bb
picc_bb
picc_bb
picc_bb
Pin Description
5 V Analog Supply
Analog Ground
5 V Analog Supply(for ADC)
Analog Ground(for ADC)
Substarte Ground
5 V Digital Supply
Digital Ground
Reference Decoupling
Reference Decoupling
Analog Common Voltage
Bandgap Refernce Voltage
Analog Input; Red
Analog Input; Green
Analog Input; Blue
STRTLN indicates beginning of line
CDS Reset Clock Pulse Input
CDS Data Clock Pulse Input
A/D Converter Sample Clock Input
Chip Select; Active Low
Write Strobe; Active Low
Read Strobe; Active Low
Output Enable; Active Low
Data Inputs/Outputs
Register Select
Channel Select in External MUX Control
External MUX Control; Active Low
I/O TYPE ABBR.
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AI : Analog Input
AO : Analog Output
AP : Analog Power
DP : Digital Power
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DI : Digital Input
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DO : Analog Output
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AG : Analog Ground
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DG : Digital Ground
AB : Analog Bidirectional Port
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DB : Digital Bidirectional Port
3
AFE FOR CCD/CIS SIGNAL PROCESSOR
BL8531H
CORE PIN CONFIGURATION
BGR
VSSA2
VDDA2
VSSA1
VDDA1
REFT
VCOM REFB
EXT_MCTL
MCTL1,MCTL2
R_VIN
G_VIN
B_VIN
VDDD
VSSD
VBB
STRTLN
CDS1_CLK CDS2_CLK
ADCCLK
D[11:0]/MPU[7:0]
bl8531h
AD[2:0]
CSB
WRB
RDB
OEB
ABSOLUTE MAXIMUM RATINGS
Charateritics
Supply Voltage
Analog Input Voltage
Digital Input Voltage
Digital Output Voltage
Reference Voltage
Storage Temperature Range
Operating Temperature Range
Symbol
VDD
AIN
CLK
V
OH, VOL
VRT/VRB
Tstg
Topr
Value
6.5
VSS to VDD
VSS to VDD
VSS to VDD
VSS to VDD
-45 to 150
0 to 70
Units
V
V
V
V
V
°C
°C
NOTES:
1. ABSOLUTE MAXIMUM RATING specifies the values beyond which the device may be damaged permanently. Exposure to
ABSOLUTE MAXIMUM RATING conditions for extended periods may affect reliability. Each condition value is applied with
the other values kept within the following operating conditions and function operation under any of these conditions is not
implied.
2. All voltages are measured with respect to VSS unless otherwise specified.
3. 100pF capacitor is discharged through a 1.5kΩ resistor (Human body model)
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BL8531H
AFE FOR CCD/CIS SIGNAL PROCESSOR
ANALOG SPECIFICATIONS
(VDDA = 5V, VDDD = 5V, ADCCLK = 6MHz, CDS1_CLK = 2MHz, CDS2_CLK = 2MHz, PGA Gain = 1
unless otherwise noted)
Characteristics
Resolution
Signal-to-Noise & Distortion Ratio
Conversion Rate
3-Channel with CDS
1-Channel with CDS
Differential Nonlinearity
Integral Nonlinearity
Unipolar Offset Error
Gain Error
Anlog Input
Full-Scale Input
Input Capacitance
Reference Top
Reference Bottom
Power Supply
Analog Voltage
Digital Voltage
Analog Current
Digital Current
Power Consumption
Temperature Range
0
VDDA
VDDD
IDDA
IDDD
5
5
65
10
375
70
V
V
mA
mA
mW
°C
0.06
8
3.5
1.5
4.0
Vp-p
Pf
V
V
5V
±5%
5V
±5%
DNL
INL
6
6
±
1
±
2
1.0
2.0
MSPS
MSPS
LSB
LSB
%FSR
%FSR
SNDR
Symbol
Min
12
60
Typ
Max
Unit
Bits
dB
Comment
5