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FQZX363C5V6-WBFBP-06C

Description
QUAD SURFACE MOUNT ZENER DIODE ARRAY
File Size210KB,4 Pages
ManufacturerJCET
Websitehttp://www.cj-elec.com/

Jiangsu Changdian Technology Co., Ltd. focuses on semiconductor packaging and testing business, providing customers at home and abroad with a full range of solutions such as chip testing, packaging design, packaging testing, etc. The company was successfully listed on the Shanghai Main Board in 2003, becoming the first semiconductor packaging and testing listed company in China. It now has a national enterprise technology center and a postdoctoral research workstation. It is a national key high-tech enterprise, a supporting unit of the National Engineering Laboratory for High-density Integrated Circuits, and the chairman unit of the Integrated Circuit Packaging Technology Innovation Strategic Alliance.

Discrete devices: diodes (switching diodes, Schottky diodes (Schottky rectifiers), voltage regulator diodes, Pin diodes, TVS diodes, rectifier diodes, fast recovery diodes); transistors (Darlington tubes, digital transistors, MOSFETs); thyristors: silicon-controlled rectifiers, triacs; composite tubes: transistors + field-effect tubes, dual transistors, dual digital transistors, digital transistors + transistors, transistors + diodes, field-effect tubes + diodes, dual field-effect tubes. Voltage regulator circuit; energy-saving lamp charger switch tube

Lead frame: TO series (TO); SOD series (SOD); SOT series (TSOT, SOT); FBP series (WBFBP); QFN series (QFNWB, DFNWB, DFNFC, QFNFC); ​​QFP series (LQFP: PQFP: PLCC: TQFP); SIP series (SIP, HSIP, FSIP); SOP series (SOP, HSOP, SSOP, MSOP, HTSOP, TSSOP); DIP series (DIP, FDIP, SDIP); PDFN series; PQFN series; MIS series (MISFC, MISWB)

Nine core technologies: Through Silicon Via (TSV) packaging technology; SiP RF packaging technology; wafer-level 3D rewiring packaging process technology; copper bump interconnection technology; high-density FC-BGA packaging and testing technology (Flip Chip BGA); multi-turn array four-sided pinless packaging and testing technology; package body 3D stacking technology; 50μm or less ultra-thin chip 3D stacking packaging technology; MEMS multi-chip packaging technology; MIS packaging technology (pre-encapsulated interconnection system); BGA packaging technology, etc.

 

 

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FQZX363C5V6-WBFBP-06C Overview

QUAD SURFACE MOUNT ZENER DIODE ARRAY

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JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO.,LTD
WBFBP-06C Plastic-Encapsulate Diodes
FQZX363C5V6~QZX363C20
QUAD SURFACE MOUNT ZENER DIODE ARRAY
DESCRIPTION
Epitaxial planar Silicon diode
FEATURES
Nominal Zener Voltages: 5.6V, 6.8V, 12V,15V, 20V
Ultra-Small Surface Mount Package
APPLICATION
Ideal For Transient Suppression,Sim card circuit
For portable equipment:(i.e. Mobile phone,MP3, MD,CD-ROM,
DVD-ROM, Note book PC, etc.)
Maximum Ratings
Forward Voltage
*1
Power Dissipation
Thermal Resistance, Junction to Ambient Air
Operating and Storage Temperature Range
@TA=25℃ unless otherwise specified
Symbol
@I
F
=10mA
V
F
P
d
R
θ
JA
T
j
,T
STG
Value
0.9
150
625
-65 to +150
Unit
V
mW
℃/w
1
WBFBP-06C
(2×2×0.5)
unit: mm
Characteristic
Electrical Characteristics
@ T
A
= 25°C unless otherwise specified
Temperature
Zener Voltage
Type
mumber
Marking
code
V
Z
@I
ZT
Nom(V)
QZX363C5V6
QZX363C6V8
QZX363C12
QZX363C15
QZX363C20
K5F
K6F
KFF
KJF
KMF
5.6
6.8
12
15
20
Min(V)
5.32
6.47
11.4
13.8
19.0
Max(V)
5.88
7.14
12.7
15.6
21.0
Range
*1
Maximum Zener
Impedance
*2
Maximum
Reverse
Current
I
R
uA
1
2
0.1
0.1
0.1
*1
Coefficent
Of
Zener voltage
@I
ZT=5mA
mV/℃
Min
-2.0
1.2
6.0
9.2
14.4
Max
2.5
4.5
10.0
13.0
18.0
Z
ZT
@I
ZT
40
15
25
30
55
mA
5
5
5
5
5
Z
ZK
@I
ZK
400
80
150
200
225
mA
1
1
1
1
1
V
R
V
2.0
4.0
8.0
10.5
14
Notes:1. Short duration test pulse used to minimize self-heating effect.
2. f = 1KHz.
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