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NLX3G17AMX1TCG

Description
Buffers & Line Drivers TRIPLE BUFFER
Categorysemiconductor    logic   
File Size133KB,11 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
Environmental Compliance
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NLX3G17AMX1TCG Overview

Buffers & Line Drivers TRIPLE BUFFER

NLX3G17AMX1TCG Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerON Semiconductor
Product CategoryBuffers & Line Drivers
RoHSDetails
Number of Input Lines3 Input
Number of Output Lines3 Output
PolarityNon-Inverting
Supply Voltage - Max5.5 V
Supply Voltage - Min1.65 V
Minimum Operating Temperature- 55 C
Maximum Operating Temperature+ 125 C
Mounting StyleSMD/SMT
Package / CaseULLGA-8
PackagingCut Tape
PackagingMouseReel
PackagingReel
FunctionSchmitt Trigger Buffer
Height0.35 mm (Max)
Length1.95 mm
Quiescent Current1 uA
TechnologyCMOS
Width1 mm
Number of Channels3
Supply Current - Max1 uA
High Level Output Current- 32 mA
Input Signal TypeSingle-Ended
Low Level Output Current32 mA
Operating Supply Voltage1.8 V, 2.5 V, 3.3 V, 5 V
Propagation Delay Time5 ns at 3 V to 3.6 V, 4.9 ns at 4.5 V to 5.5 V
Factory Pack Quantity3000
NLX3G17
Triple Non-Inverting
Schmitt-Trigger Buffer
The NLX3G17 MiniGatet is an advanced high−speed CMOS
triple non−inverting Schmitt−trigger buffer in ultra−small footprint.
The NLX3G17 input and output structures provide protection when
voltages up to 7.0 V are applied, regardless of the supply voltage.
The NLX3G17 can be used to enhance noise immunity or to square
up slowly changing waveforms.
Features
http://onsemi.com
MARKING
DIAGRAMS
ULLGA8
1.45 x 1.0
CASE 613AA
KM
Designed for 1.65 V to 5.5 V V
CC
Operation
Low Power Dissipation: I
CC
= 1
mA
(Max) at T
A
= 25°C
24 mA Balanced Output Source and Sink Capability @ V
CC
= 3.0 V
Balanced Propagation Delays
Overvoltage Tolerant (OVT) Input and Output Pins
Ultra−Small Packages
These are Pb−Free Devices
1
1
ULLGA8
1.6 x 1.0
CASE 613AB
AEM
G
1
IN A1
1
8
V
CC
ULLGA8
1.95 x 1.0
CASE 613AC
AEM
G
OUT Y3
2
7
OUT Y1
UDFN8
1.45 x 1.0
CASE 517BZ
XM
1
IN A2
3
6
IN A3
GND
4
UDFN8
1.6 x 1.0
CASE 517BY
XM
1
5
OUT Y2
UDFN8
1.95 x 1.0
CASE 517CA
XM
1
Figure 1. Pinout
(Top View)
1
1
1
IN A1
IN A2
IN A3
OUT Y1
OUT Y2
OUT Y3
K or AE = Specific Device Code
M
= Date Code
G
= Pb−Free Package
Figure 2. Logic Symbol
PIN ASSIGNMENT
1
2
3
4
IN A1
OUT Y3
IN A2
GND
OUT Y2
IN A3
OUT Y1
V
CC
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
FUNCTION TABLE
A
L
H
Y
L
H
5
6
7
8
©
Semiconductor Components Industries, LLC, 2012
January, 2012
Rev. 1
1
Publication Order Number:
NLX3G17/D
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