Datasheet
Serial-in / Parallel-out Driver Series
4-input Serial-in / Parallel-out Drivers
BU2092F BU2092FV
Description
BU2092F/BU2092FV are an open drain output driver.It
incorporates a built-in shift register and a latch circuit to
turn on a maximum of 12 output by a 4-line interface,
linked to a microcontroller.
An open drain output provides maximum 25mA current.
Key Specifications
Power supply voltage range:
Output voltage:
Operating temperature range:
2.7V to 5.5V
0V to +25.0V
-25℃ to +75℃
Features
LED can be driven directly
12bit parallel output
This product can be operated on low voltage
Pin Configurations
(Top View)
VSS 1
DATA
CLOCK
LCK
Q0
Q1
Q2
Q3
Q4
2
3
4
5
6
7
8
9
SOP18
BU2092F
18 VDD
17 OE
16 Q11
15 Q10
14 Q9
13 Q8
12 Q7
11 Q6
10 Q5
Package
SOP18
SSOP-B20
W(Typ) x D(Typ) x H(Max)
11.20mm x 7.80mm x 2.01mm
6.50mm x 6.40mm x 1.45mm
SOP18
BU2092F
SSOP-B20
BU2092FV
Block Diagrams
Controller
CLOCK
Shift
Register
(Top View)
VSS 1
DATA
CLOCK
LCK
Q0
Q1
Q2
Q3
Q4
2
3
4
5
6
7
8
9
20 VDD
19 OE
18 Q11
17 Q10
16 Q9
15 Q8
14 Q7
13 N.C.
12 N.C.
11 Q6
SSOP-B20
BU2092FV
DATA
12bit
LCK
OE
Latch
Write Buffer
Q0½Q11
Q5 10
○Product
structure：Silicon monolithic integrated circuit
.
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© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
○This
product has not designed protection against radioactive rays
1/13
TSZ02201-0RHR1GZ00130-1-2
18.Sep.2015 Rev.002
BU2092F BU2092FV
Pin Descriptions
BU2092F
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Pin Name
VSS
DATA
CLOCK
LCK
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
OE
VDD
I
-
Output Enable (“H” level : Output is OFF)
Power Supply
O
Parallel Data Output (Nch Open Drain )
Latch Data
L
H
Output
ON
OFF
I/O
-
I
I
I
Ground
Serial Data Input
Shift clock of DATA (Rising Edge Trigger)
Latch clock of DATA (Rising Edge Trigger)
Function
BU2092FV
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Pin Name
VSS
DATA
CLOCK
LCK
Q0
Q1
Q2
Q3
Q4
Q5
Q6
N.C.
N.C.
Q7
Q8
Q9
Q10
Q11
OE
VDD
I
-
Output Enable (“H” level : Output is OFF)
Power Supply
O
Parallel Data Output (Nch Open Drain )
Latch Data
L
H
Output
ON
OFF
-
-
Non Connected
Non Connected
O
Parallel Data Output (Nch Open Drain )
Latch Data
Output
L
ON
H
OFF
I/O
-
I
I
I
Ground
Serial Data Input
Shift clock of DATA (Rising Edge Trigger)
Latch clock of DATA (Rising Edge Trigger)
Function
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© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
2/13
TSZ02201-0RHR1GZ00130-1-2
18.Sep.2015 Rev.002
BU2092F BU2092FV
Absolute Maximum Ratings
Parameter
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Storage Temperature
Power Dissipation
Symbol
V
DD
V
IN
V
O
T
opr
T
stg
P
D
Limits
-0.3 to +7.0
V
SS
-0.3 to V
DD
+0.3
V
SS
to +25.0
-25 to +75
-55 to +125
SOP18
SSOP-B20
0.55
0.65
(Note 1)
(Note 2)
Unit
V
V
V
°C
°C
W
(Note 1) Mounted on 70mm x 70mm x 1.6mm glass epoxy board. Reduce 5.5mW per 1°C above 25°C.
(Note 2) Mounted on 70mm x 70mm x 1.6mm glass epoxy board. Reduce 6.5mW per 1°C above 25°C.
Caution:
Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated
over the absolute maximum ratings.
Recommended Operating Conditions
(T
A
=25℃, V
SS
=0V)
Parameter
Supply Voltage
Output Voltage
Symbol
V
DD
V
O
Limits
+2.7 to +5.5
0 to 25.0
Unit
V
V
Electrical Characteristics
DC Characteristics
(Unless otherwise specified, V
DD
=5V, V
SS
=0V, T
A
=25℃)
Parameter
Input high-level Voltage
Input low-level Voltage
Output low-level Voltage
Output high-level Leak Current
Output low-level Leak Current
Quiescent Current
Symbol
V
IH
V
IL
V
OL
I
IH
I
IL
I
DD
Limits
Min
3.5
-
-
-
-
-
Typ
-
-
-
-
-
-
Max
-
1.5
2.0
10.0
-5.0
5.0
Unit
V
V
V
μA
μA
μA
Condition
-
-
I
OL
=20mA
V
O
=25.0V
V
O
=0V
V
IN
=V
SS
or V
DD
Q0 to Q11:OPEN
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© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
3/13
TSZ02201-0RHR1GZ00130-1-2
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BU2092F BU2092FV
Electrical Characteristics - continued
Timing Characteristics
(Unless otherwise specified, V
DD
=5V, V
SS
=0V, T
A
=25℃)
Limit
Parameter
Symbol
Min
1000
500
1000
500
400
200
400
200
400
200
-
-
-
-
-
-
-
-
Typ
-
-
-
-
-
-
-
-
-
-
90
55
115
50
70
45
80
35
Max
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Unit
V
DD
(V)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3
5
3
5
3
5
3
5
3
5
3
5
3
5
3
5
3
5
R
L
=5kΩ
C
L
=10pF
R
L
=5kΩ
C
L
=10pF
R
L
=5kΩ
C
L
=10pF
R
L
=5kΩ
C
L
=10pF
-
Condition
Minimum Clock Pulse Width
Minimum Latch Pulse Width
(LCK)
Setup Time
(LCK→CLOCK)
Setup Time
(DATA→CLOCK)
Hold Time
(CLOCK→DATA)
t
w
t
w
(LCK)
t
s
-
-
t
su
-
t
H
t
PLZ
(LCK)
t
PZL
(LCK)
t
PLZ
t
PZL
-
Propagation
(LCK→OUTPUT Q
X
)
Propagation
(
OE
→OUTPUT
Q
X
)
Waveform of Timing Characteristics
t
W
90%
90%
10%
10%
t
W
90%
90%
V
DD
V
SS
V
DD
V
SS
CLOCK
10%
t
SU
90%
t
H
90%
DATA
t
S
t
W
(CLK)
50%
90%
50%
90%
V
DD
V
SS
LCK
10%
t
PLZ
(LCK)
OE
t
PZL
(LCK)
50%
50%
V
DD
V
SS
t
PLZ
t
PZL
50%
V
DD
V
SS
Qx
10%
50%
10%
Figure 1. Waveform of Timing Characteristics
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© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
4/13
TSZ02201-0RHR1GZ00130-1-2
18.Sep.2015 Rev.002
BU2092F BU2092FV
Test Circuits (Figures are in case of BU2092F)
V
DD
R
L
=10kΩ
R
L
R
L
R
L
R
L
R
L
R
L
R
L
+25V
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
V
SS
V
IH
V
IL
V
SS
R
L
R
L
R
L
R
L
R
L
PatternGenerator
Figure 2. Test Circuit of Input H/LVoltage
V
DD
18
17
16
15
14
13
12
11
10
12
SW
1
2
3
4
5
6
7
8
9
V
SS
1
I
OL
V
OL
PatternGenerator
Figure 3. Test Circuit of Output L Voltage
V
SS
V
SS
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© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
5/13
TSZ02201-0RHR1GZ00130-1-2
18.Sep.2015 Rev.002
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