BCM20730A1KMLGT datasheet, PDF

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BCM20730A1KMLGT: DescriptionRF System on a Chip - SoC Single-Chip BT; CategoryWireless rf/communication Telecom circuit; File Size757KB，50 Pages; ManufacturerCypress Semiconductor; Environmental Compliance

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BCM20730A1KMLGT Overview

RF System on a Chip - SoC Single-Chip BT

BCM20730A1KMLGT Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Cypress Semiconductor
package instruction	QFN-40
Reach Compliance Code	compliant
JESD-30 code	S-XQCC-N40
length	6 mm
Number of functions	1
Number of terminals	40
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Maximum seat height	1 mm
Nominal supply voltage	1.2 V
surface mount	YES
technology	CMOS
Telecom integrated circuit types	TELECOM CIRCUIT
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	6 mm

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CYW20730

Single-Chip Bluetooth Transceiver for

Wireless Input Devices

The Cypress CYW20730 is a Bluetooth 3.0-compliant, stand-alone baseband processor with an integrated 2.4 GHz transceiver. It is

ideal for wireless input device applications including game controllers, keyboards, 3D glasses, remote controls, gestural input devices,

and sensor devices. Built-in firmware adheres to the Bluetooth Human Interface Device (HID) profile and Bluetooth Device ID profile

specifications.

The CYW20730 radio has been designed to provide low power, low cost, and robust communications for applications operating in the

globally available 2.4 GHz unlicensed ISM band. It is fully compliant with Bluetooth Radio Specification 3.0.

The single-chip Bluetooth transceiver is a monolithic component implemented in a standard digital CMOS process and requires

minimal external components to make a fully compliant Bluetooth device. The CYW20730 is available in three package options: a 32-

pin, 5 mm × 5 mm QFN, a 40-pin, 6 mm × 6 mm QFN, and a 64-pin, 7 mm × 7 mm BGA.

Cypress Part Numbering Scheme

Cypress is converting the acquired IoT part numbers from Broadcom to the Cypress part numbering scheme. Due to this conversion,

there is no change in form, fit, or function as a result of offering the device with Cypress part number marking. The table provides

Cypress ordering part number that matches an existing IoT part number.

Table 1. Mapping Table for Part Number between Broadcom and Cypress

Broadcom Part Number

BCM20730

BCM20730A2KML2GT

BCM20730A1KML2G

BCM20730A1KMLG

BCM20730A1KFBGT

BCM20730A2KFBG

BCM20730A1KFBG

BCM20730A1KML2GT

BCM20730A2KML2G

BCM20730A1KMLGT

BCM20730A2KFBGT

CYW20730

CYW20730A2KML2GT

CYW20730A1KML2G

CYW20730A1KMLG

CYW20730A1KFBGT

CYW20730A2KFBG

CYW20730A1KFBG

CYW20730A1KML2GT

CYW20730A2KML2G

CYW20730A1KMLGT

CYW20730A2KFBGT

Cypress Part Number

Acronyms and Abbreviations

In most cases, acronyms and abbreviations are defined on first use.

For a comprehensive list of acronyms and other terms used in Cypress documents, go to

http://www.cypress.com/glossary.

Applications

■

Wireless pointing devices: mice, trackballs, gestural controls

Wireless keyboards

3D glasses

Remote controls

Game controllers

■

Point-of-sale (POS) input devices

Remote sensors

Home automation

Personal health and fitness monitoring

Cypress Semiconductor Corporation

Document Number: 002-14824 Rev. *J

•

198 Champion Court

•

San Jose

CA 95134-1709

•

408-943-2600

Revised April 25, 2017

CYW20730

1. Functional Description

1.1 Keyboard Scanner

The keyboard scanner is designed to autonomously sample keys and store them into buffer registers without the need for the host

microcontroller to intervene. The scanner has the following features:

■

Ability to turn off its clock if no keys pressed.

Sequential scanning of up to 160 keys in an 8 x 20 matrix.

Programmable number of columns from 1 to 20.

Programmable number of rows from 1 to 8.

16-byte key-code buffer (can be augmented by firmware).

128 kHz clock – allows scanning of full 160-key matrix in about 1.2 ms.

N-key rollover with selective 2-key lockout if ghost is detected.

Keys are buffered until host microcontroller has a chance to read it, or until overflow occurs.

Hardware debouncing and noise/glitch filtering.

Low-power consumption. Single-digit µA-level sleep current.

1.1.1 Theory of Operation

The key scan block is controlled by a state machine with the following states:

Idle

The state machine begins in the idle state. In this state, all column outputs are driven high. If any key is pressed, a transition occurs

on one of the row inputs. This transition causes the 128 kHz clock to be enabled (if it is not already enabled by another peripheral)

and the state machine to enter the scan state. Also in this state, an 8-bit row-hit register and an 8-bit key-index counter is reset to 0.

Scan

In the scan state, a row counter counts from 0 up to a programmable number of rows minus 1. Once the last row is reached, the row

counter is reset and the column counter is incremented. This cycle repeats until the row and column counters are both at their

respective terminal count values. At that point, the state machine moves into the Scan-End state.

As the keys are being scanned, the key-index counter is incremented. This counter is the value compared to the modifier key codes

stored, or in the key-code buffer if the key is not a modifier key. It can be used by the microprocessor as an index into a lookup table

of usage codes.

Also, as the n-th row is scanned, the row-hit register is ORed with the current 8-bit row input values if the current column contains two

or more row hits. During the scan of any column, if a key is detected at the current row, and the row-hit register indicates that a hit

was detected in that same row on a previous column, then a ghost condition may have occurred, and a bit in the status register is set

to indicate this.

Scan End

This state determines whether any keys were detected while in the scan state. If yes, the state machine returns to the scan state. If

no, the state machine returns to the idle state, and the 128 kHz clock request signal is made inactive.

The microcontroller can poll the key status register.

Document Number: 002-14824 Rev. *J

Page 5 of 50

BCM20730A1KMLGT Related Products

	BCM20730A1KMLGT	BCM20730A1KFBGT	BCM20730A2KFBGT
Description	RF System on a Chip - SoC Single-Chip BT	RF System on a Chip - SoC Single-Chip BT	RF System on a Chip - SoC Single-Chip BT
Is it lead-free?	Lead free	-	Lead free
Is it Rohs certified?	conform to	-	conform to
Maker	Cypress Semiconductor	-	Cypress Semiconductor
package instruction	QFN-40	-	FBGA-64
Reach Compliance Code	compliant	-	compliant
JESD-30 code	S-XQCC-N40	-	S-PBGA-B64
length	6 mm	-	7 mm
Number of functions	1	-	1
Number of terminals	40	-	64
Maximum operating temperature	70 °C	-	70 °C
Package body material	UNSPECIFIED	-	PLASTIC/EPOXY
encapsulated code	HVQCCN	-	VFBGA
Package shape	SQUARE	-	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	-	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	-	NOT SPECIFIED
Maximum seat height	1 mm	-	1 mm
Nominal supply voltage	1.2 V	-	1.2 V
surface mount	YES	-	YES
technology	CMOS	-	CMOS
Telecom integrated circuit types	TELECOM CIRCUIT	-	TELECOM CIRCUIT
Temperature level	COMMERCIAL	-	COMMERCIAL
Terminal form	NO LEAD	-	BALL
Terminal pitch	0.5 mm	-	0.8 mm
Terminal location	QUAD	-	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED	-	NOT SPECIFIED
width	6 mm	-	7 mm

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