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HV66PJ-G M903

Description
LCD Drivers LCD DRVR 5V
Categorysemiconductor    Other integrated circuit (IC)   
File Size711KB,7 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
Download Datasheet Parametric Compare View All

HV66PJ-G M903 Overview

LCD Drivers LCD DRVR 5V

HV66PJ-G M903 Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerMicrochip
Product CategoryLCD Drivers
RoHSDetails
Maximum Clock Frequency5 MHz
Operating Supply Voltage4.5 V to 5.5 V
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 85 C
Package / CasePLCC-44
PackagingReel
Height3.68 mm
Length16.59 mm
Width16.59 mm
Mounting StyleSMD/SMT
Supply Current - Max15 mA
Pd - Power Dissipation1200 mW
Factory Pack Quantity500
Unit Weight0.084185 oz
Supertex inc.
32-Channel LCD Driver
with Separate Backplane Output
Features
HVCMOS
®
technology
32 push-pull CMOS output up to 60V
Low power level shifting
Shift register speed 5.0MHz
Latched data outputs
Bidirectional shift register (DIR)
Backplane output
HV66
General Description
The HV66 is a low voltage serial to high voltage parallel converter
with push-pull outputs. This device has been designed for use as
a driver circuit for LCD displays. It can also be used in any appli-
cation requiring multiple output high voltage current sourcing and
sinking capabilities. The inputs are fully CMOS compatible.
The device consists of a 32-bit shift register, 32 latches, and con-
trol logic to perform blanking and polarity control of the outputs.
HV
OUT
1 is connected to the first stage of the shift register. Data is
shifted through the shift register on the logic rising transition of the
clock. A DIR pin causes data shifting clockwise when grounded
and counter clockwise when connected to VDD. A data output
buffer is provided for cascading devices. This output reflects the
current status of the last bit of the shift register. Operation of the
shift register is not affected by the LE (latch enable), BL (blank) or
the POL (polarity) inputs. Transfer of data from the shift register to
the latch occurs when the LE (latch enable) input is high. The data
in the latch is stored after LE transitions from high to low.
Functional Block Diagram
VPP
POL
BL
LE
VDD
DATA IN
Latch
HV
OUT
1
CLK
DIR
32-Bit
Shift
Register
Latch
HV
OUT
2
(Outputs 3 to 30
not shown)
Latch
DATA OUT
HV
OUT
31
Latch
HV
OUT
32
BP
OUT
GND
Doc.# DSFP-HV66
C070313
Supertex inc.
www.supertex.com

HV66PJ-G M903 Related Products

HV66PJ-G M903 HV66PG-M919
Description LCD Drivers LCD DRVR 5V LCD Drivers 32V 32Ch w/Backplane
Product Attribute Attribute Value Attribute Value
Manufacturer Microchip Microchip
Product Category LCD Drivers LCD Drivers
RoHS Details In Transition
Maximum Clock Frequency 5 MHz 5 MHz
Operating Supply Voltage 4.5 V to 5.5 V 4.5 V to 5.5 V
Minimum Operating Temperature - 40 C - 40 C
Maximum Operating Temperature + 85 C + 85 C
Package / Case PLCC-44 PQFP-44
Height 3.68 mm 2 mm
Length 16.59 mm 10 mm
Width 16.59 mm 10 mm
Mounting Style SMD/SMT SMD/SMT
Supply Current - Max 15 mA 15 mA
Pd - Power Dissipation 1200 mW 1200 mW
Factory Pack Quantity 500 500
Unit Weight 0.084185 oz 0.017588 oz
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