MPC8545HXATG datasheet, PDF - EEWORLD Datasheet

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MPC8545HXATG: DescriptionMicroprocessors - MPU PQ38 8548; CategoryThe embedded processor and controller Microcontrollers and processors; File Size843KB，151 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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Microprocessors - MPU PQ38 8548

MPC8545HXATG Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	NXP
Parts packaging code	BGA
package instruction	29 X 29 MM, 1 MM PITCH, CERAMIC, FCBGA-783
Contacts	783
Reach Compliance Code	not_compliant
ECCN code	5A992
Address bus width	64
bit size	32
boundary scan	YES
maximum clock frequency	133 MHz
External data bus width	64
Format	FLOATING POINT
Integrated cache	YES
JESD-30 code	S-CBGA-B783
JESD-609 code	e0
length	29 mm
low power mode	YES
Humidity sensitivity level	1
Number of terminals	783
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	BGA
Encapsulate equivalent code	BGA783,28X28,40
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	260
power supply	1.2,2.5/3.3 V
Certification status	Not Qualified
Maximum seat height	3.38 mm
speed	1200 MHz
Maximum supply voltage	1.155 V
Minimum supply voltage	1.045 V
Nominal supply voltage	1.1 V
surface mount	YES
technology	CMOS
Terminal surface	Tin/Lead/Silver (Sn/Pb/Ag)
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	40
width	29 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR

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Freescale Semiconductor

Data Sheet: Technical Data

Document Number: MPC8548E

Rev. 9, 02/2012

MPC8548E PowerQUICC III

Integrated Processor

Hardware Specifications

Overview

Contents

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . 10

Power Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 15

Input Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

RESET Initialization . . . . . . . . . . . . . . . . . . . . . . . . . 19

DDR and DDR2 SDRAM . . . . . . . . . . . . . . . . . . . . . 20

DUART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Enhanced Three-Speed Ethernet (eTSEC) . . . . . . . . 27

Ethernet Management Interface Electrical

Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Programmable Interrupt Controller . . . . . . . . . . . . . 53

JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

GPOUT/GPIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

PCI/PCI-X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

High-Speed Serial Interfaces (HSSI) . . . . . . . . . . . . 65

PCI Express . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Serial RapidIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

Package Description . . . . . . . . . . . . . . . . . . . . . . . . . 91

Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130

Thermal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134

System Design Information . . . . . . . . . . . . . . . . . . 135

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 145

Document Revision History . . . . . . . . . . . . . . . . . . 148

This section provides a high-level overview of the device

features. The following figure shows the major functional

units within the device.

Although this document is written from the perspective of

the MPC8548E, most of the material applies to the other

family members, such as MPC8547E, MPC8545E, and

MPC8543E. When specific differences occur, such as pinout

differences and processor frequency ranges, they are

identified as such.

For specific PVR and SVR numbers, see the

MPC8548E

PowerQUICC III Integrated Host Processor Reference

Manual.

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