Data Sheet
FEATURES
10-Bit, Integrated, Multiformat SDTV/HDTV
Video Decoder and RGB Graphics Digitizer
ADV7181C
GENERAL DESCRIPTION
The ADV7181C is a high quality, single-chip, multiformat video
decoder and graphics digitizer. This multiformat decoder supports
the conversion of PAL, NTSC, and SECAM standards in the
form of composite or S-Video into a digital ITU-R BT.656 format.
The ADV7181C also supports the decoding of a component
RGB/YPrPb video signal into a digital YCrCb or RGB pixel output
stream. The support for component video includes standards
such as 525i, 625i, 525p, 625p, 720p, 1080i, and many other HD
and SMPTE standards. Graphics digitization is also supported by
the ADV7181C; it is capable of digitizing RGB graphics signals
from VGA to XGA rates and converting them into a digital
DDR RGB or YCrCb pixel output stream. SCART and overlay
functionality are enabled by the ability of the ADV7181C to
process simultaneously CVBS and standard definition RGB
signals. The mixing of these signals is controlled by the fast
blank pin.
The ADV7181C contains two main processing sections. The
first section is the standard definition processor (SDP), which
processes all PAL, NTSC, and SECAM signal types. The second
section is the component processor (CP), which processes YPrPb
and RGB component formats, including RGB graphics.
Note that the ADV7181C has unique software and hardware
configuration requirements. See Page 19 of this data sheet for
more information.
Four 10-bit ADCs sampling up to 110 MHz
6 analog input channels
SCART fast blank support
Internal antialias filters
NTSC, PAL, and SECAM color standards support
525p/625p component progressive scan support
720p/1080i component HDTV support
Digitizes RGB graphics up to 1024 × 768 at 70 Hz (XGA)
3 × 3 color space conversion matrix
Industrial temperature range: −40°C to +85°C
12-bit 4:4:4 DDR, 8-/10-/16-/20-bit SDR pixel output interface
Programmable interrupt request output pin
Small package
Low pin count
Single front end for video and graphics
VBI data slicer (including teletext)
Qualified for automotive applications
APPLICATIONS
Automotive entertainment
HDTVs
LCD/DLP projectors
HDTV STBs with PVR
DVD recorders with progressive scan input support
AVR receivers
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2012 Analog Devices, Inc. All rights reserved.
ADV7181C
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Functional Block Diagram .............................................................. 3
Specifications..................................................................................... 4
Electrical Characteristics ............................................................. 4
Video Specifications ..................................................................... 5
Timing Characteristics ................................................................ 6
Analog Specifications ................................................................... 8
Absolute Maximum Ratings ............................................................ 9
Package Thermal Performance ................................................... 9
Thermal Specifications ................................................................ 9
ESD Caution .................................................................................. 9
Pin Configuration and Function Descriptions ........................... 10
Detailed Functionality ................................................................... 12
Analog Front End ....................................................................... 12
SDP Pixel Data Output Modes ................................................. 12
Data Sheet
CP Pixel Data Output Modes ................................................... 12
Composite and S-Video Processing ......................................... 12
Component Video Processing .................................................. 13
RGB Graphics Processing ......................................................... 13
General Features ......................................................................... 13
Detailed Description ...................................................................... 14
Analog Front End ....................................................................... 14
Standard Definition Processor (SDP)...................................... 14
Component Processor (CP) ...................................................... 14
Analog Input Muxing ................................................................ 15
Pixel Output Formatting................................................................ 17
Recommended External Loop Filter Components .................... 18
Typical Connection Diagram........................................................ 19
Outline Dimensions ....................................................................... 20
Ordering Guide .......................................................................... 20
Automotive Products ................................................................. 20
REVISION HISTORY
8/12—Rev. D to Rev. E
Changes to Table 3 ............................................................................. 6
Change to Figure 6 ..........................................................................10
5/12—Rev. C to Rev. D
Changes to Features and General Description Sections.............. 1
Added Text to Typical Connection Diagram Section ................ 19
Added Automotive Products Section........................................... 20
12/09—Rev. B to Rev. C
Changes to Product Title, Features Section, and General
Description Section .......................................................................... 1
Changes to Figure 1 .......................................................................... 3
Changes to Power Requirements Parameter, Table 1 .................. 4
Changes to System Clock and Crystal Parameter and Note 3,
Table 3 ................................................................................................ 6
Deleted Note 3, Table 3; Renumbered Sequentially ..................... 6
Added Timing Diagrams Section ................................................... 7
Changed AVDD = 3.1.5 V to 3.45 V to AVDD = 3.15 V to
3.45 V ................................................................................................. 8
Changes to Package Thermal Performance .................................. 9
Added Thermal Specifications Section.......................................... 9
Changes to SDP Pixel Data Output Modes Section ................... 12
Changes to RGB Graphics Processing Section ........................... 13
Changes to Component Processor (CP) Section ....................... 14
Changes to Analog Input Muxing Section .................................. 15
4/09—Rev. A to Rev. B
Changes to Package Thermal Performance Section .....................8
Changes to the Pin Configuration and Function Descriptions
Section .................................................................................................9
Removed LFCSP_VQ Package ..................................................... 19
Changes to Ordering Guide .......................................................... 19
1/09—Rev. 0 to Rev. A
Changes to Analog Supply Current Parameter, Table 1 ...............4
Changes to Package Thermal Performance Section .....................8
Deleted Thermal Specifications Section.........................................8
Added Pin 65 (EPAD) .................................................................... 10
Changes to Analog Input Muxing Section .................................. 15
Changes to Ordering Guide .......................................................... 20
8/08—Revision 0: Initial Version
Rev. E | Page 2 of 20
Data Sheet
ADV7181C
MACROVISION
DETECTION
STANDARD
AUTODETECTION
VBI DATA RECOVERY
10
ADC0
10
CVBS/Y
Y
LUMA
FILTER
LUMA
RESAMPLE
LUMA
2D COMB
(5H MAX)
10
DATA
PREPROCESSOR
ANTI-
ALIAS
FILTER
10
ADC1
DECIMATION
AND
DOWNSAMPLING 10
FILTERS
10
SYNC
EXTRACT
RESAMPLE
CONTROL
10
ADC3
CVBS
C
Cr
Cb
Y
Cr
Cb
CHROMA
DEMOD
CHROMA
FILTER
CHROMA
RESAMPLE
Cr
CHROMA
2D COMB Cb
(4H MAX)
F
SC
RECOVERY
STANDARD DEFINITION PROCESSOR
FUNCTIONAL BLOCK DIAGRAM
CLAMP
A
IN1
6
TO
A
IN
6
ANTI-
ALIAS
FILTER
10
ADC2
ANTI-
ALIAS
FILTER
ANTI-
ALIAS
FILTER
INPUT
MUX
CLAMP
10
20
10
PIXEL
DATA
P19 TO
P10
P9 TO
P0
CVBS
S-VIDEO
YPrPb
SCART–
(RGB + CVBS)
GRAPHICS RGB
CLAMP
CLAMP
HS/CS
VS
FIELD/DE
FB
Figure 1.
STDI
ACTIVE PEAK
AND
AGC
10
COLORSPACE
CONVERSION
10
10
DIGITAL
FINE
CLAMP
GAIN
CONTROL
MACROVISION
DETECTION
SCLK
FAST
BLANK
OVERLAY
CONTROL
AND
AV CODE
INSERTION
OUTPUT FIFO AND FORMATTER
07513-001
Rev. E | Page 3 of 20
SDATA
SERIAL INTERFACE
CONTROL AND VBI DATA
ALSB
LLC
SFL/
SYNCOUT
SYNC PROCESSING AND
CLOCK GENERATION
HS_IN/
CS_IN
VS_IN
SSPD
COMPONENT PROCESSOR
CGMS DATA
EXTRACTION
SOG/SOY
INT
XTAL
XTAL1
OFFSET
CONTROL
AV CODE
INSERTION
20
ADV7181C
ADV7181C
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Data Sheet
AVDD = 3.15 V to 3.45 V, DVDD = 1.65 V to 2.0 V, DVDDIO = 3.0 V to 3.6 V, PVDD = 1.71 V to 1.89 V, nominal input range 1.6 V.
T
MIN
to T
MAX
= −40°C to +85°C, unless otherwise noted.
Table 1.
Parameter
1, 2
STATIC PERFORMANCE
3, 4
Resolution (Each ADC)
Integral Nonlinearity
Symbol
N
INL
Test Conditions
Min
Typ
Max
10
±2.5
Unit
Bits
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
V
V
V
V
µA
pF
V
V
µA
µA
pF
V
V
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
ms
Differential Nonlinearity
DNL
BSL at 27 MHz (10-bit level)
BSL at 54 MHz (10-bit level)
BSL at 74 MHz (10-bit level)
BSL at 110 MHz (8-bit level)
At 27 MHz (10-bit level)
At 54 MHz (10-bit level)
At 74 MHz (10-bit level)
At 110 MHz (8-bit level)
2
0.7
±0.6
−0.6/+0.7
±1.4
±0.9
−0.2/+0.25
−0.2/+0.25
±0.9
−0.2/+1.5
−0.99/+2.5
DIGITAL INPUTS
5
Input High Voltage
6
Input Low Voltage
7
Input Current
Input Capacitance
5
DIGITAL OUTPUTS
Output High Voltage
8
Output Low Voltage
8
High Impedance Leakage Current
Output Capacitance
5
POWER REQUIREMENTS
Digital Core Power Supply
Digital I/O Power Supply
PLL Power Supply
Analog Power Supply
Digital Core Supply Current
5
V
IH
HS_IN, VS_IN low trigger mode
V
IL
HS_IN, VS_IN low trigger mode
I
IN
C
IN
V
OH
V
OL
I
LEAK
C
OUT
DVDD
DVDDIO
PVDD
AVDD
IDVDD
I
SOURCE
= 0.4 mA
I
SINK
= 3.2 mA
Pin 1
All other output pins
−10
0.8
0.3
+10
10
2.4
0.4
60
10
20
1.65
3.0
1.71
3.15
1.8
3.3
1.8
3.3
105
90
106
4
38
11
12
99
166
200
2.25
16
20
2
3.6
1.89
3.45
Digital I/O Supply Current
PLL Supply Current
Analog Supply Current
9
IDVDDIO
IPVDD
IAVDD
CVBS input sampling at 54 MHz
Graphics RGB sampling at 75 MHz
SCART RGB FB sampling at 54 MHz
CVBS input sampling at 54 MHz
Graphics RGB sampling at 75 MHz
CVBS input sampling at 54 MHz
Graphics RGB sampling at 75 MHz
CVBS input sampling at 54 MHz
Graphics RGB sampling at 75 MHz
SCART RGB FB sampling at 54 MHz
Synchronization bypass function
Power-Down Current
Green Mode Power-Down
Power-Up Time
1
2
IPWRDN
IPWRDNG
TPWRUP
The minimum/maximum specifications are guaranteed over this range.
All specifications are obtained using the Analog Devices, Inc., recommended programming scripts.
3
All ADC linearity tests performed at input range of full scale – 12.5%, and at zero scale + 12.5%.
4
Maximum INL and DNL specifications obtained with part configured for component video input.
5
Guaranteed by characterization.
6
To obtain specified V
IH
level on Pin 22, program Register 0x13 (WO) with a value of 0x04. If Register 0x13 is programmed with a value of 0x00, then V
IH
on Pin 22 is 1.2 V.
7
To obtain specified V
IL
level on Pin 22, program Register 0x13 (WO) with a value of 0x04. If Register 0x13 is programmed with a value of 0x00, then V
IL
on Pin 22 is 0.4 V.
8
V
OH
and V
OL
levels obtained using default drive strength value (0xD5) in Register Subaddress 0xF4.
9
For CVBS current measurement only, ADC0 is powered up. For RGB current measurements only, ADC0, ADC1, and ADC2 are powered up. For SCART FB current
measurements, all ADCs are powered up.
Rev. E | Page 4 of 20
Data Sheet
VIDEO SPECIFICATIONS
ADV7181C
AVDD = 3.15 V to 3.45 V, DVDD = 1.65 V to 2.0 V, DVDDIO = 3.0 V to 3.6 V, PVDD = 1.71 V to 1.89 V. T
MIN
to T
MAX
= −40°C to +85°C,
unless otherwise noted.
Table 2.
Parameter
1, 2
NONLINEAR SPECIFICATIONS
Differential Phase
Differential Gain
Luma Nonlinearity
NOISE SPECIFICATIONS
SNR Unweighted
SNR Unweighted
Analog Front-End Crosstalk
LOCK TIME SPECIFICATIONS
Horizontal Lock Range
Vertical Lock Range
f
SC
Subcarrier Lock Range
Color Lock in Time
Sync Depth Range
3
Color Burst Range
Vertical Lock Time
Horizontal Lock Time
CHROMA SPECIFICATIONS
Hue Accuracy
Color Saturation Accuracy
Color AGC Range
Chroma Amplitude Error
Chroma Phase Error
Chroma Luma Intermodulation
LUMA SPECIFICATIONS
Luma Brightness Accuracy
Luma Contrast Accuracy
1
2
Symbol
DP
DG
LNL
Test Conditions
CVBS input, modulated 5 step
CVBS input, modulated 5 step
CVBS input, 5 step
Luma ramp
Luma flat field
Min
Typ
0.5
0.5
0.5
Max
Unit
Degrees
%
%
dB
dB
dB
54
58
56
60
60
+5
70
±1.3
60
−5
40
20
5
2
100
HUE
CL_AC
5
0.5
0.4
0.2
CVBS, 1 V input
CVBS, 1 V input
1
1
1
1
200
200
%
Hz
kHz
Lines
%
%
Fields
Lines
Degrees
%
%
%
Degrees
%
%
%
400
The minimum/maximum specifications are guaranteed over this range.
Guaranteed by characterization.
3
Nominal synchronization depth is 300 mV at 100% synchronization depth range.
Rev. E | Page 5 of 20
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