AD7264BCPZ datasheet, PDF - EEWORLD Datasheet

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AD7264BCPZ: DescriptionAnalog to Digital Converters - ADC True Diff Dual 1MSPS 14-Bit 2-Ch SAR; CategoryAnalog mixed-signal IC converter; File Size1MB，29 Pages; ManufacturerADI; Websitehttps://www.analog.com; Environmental Compliance

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Analog to Digital Converters - ADC True Diff Dual 1MSPS 14-Bit 2-Ch SAR

AD7264BCPZ Parametric

Parameter Name	Attribute value
Brand Name	Analog Devices Inc
Is it lead-free?	Contains lead
Is it Rohs certified?	conform to
Maker	ADI
Parts packaging code	QFN
package instruction	HVQCCN, LCC48,.27SQ,20
Contacts	48
Manufacturer packaging code	CP-48-1
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum analog input voltage	3.3 V
Minimum analog input voltage	0.7 V
Maximum conversion time	0.56 µs
Converter type	ADC, SUCCESSIVE APPROXIMATION
JESD-30 code	S-XQCC-N48
JESD-609 code	e3
length	7 mm
Maximum linear error (EL)	0.0183%
Humidity sensitivity level	3
Number of analog input channels	2
Number of digits	14
Number of functions	2
Number of terminals	48
Maximum operating temperature	105 °C
Minimum operating temperature	-40 °C
Output bit code	2\'S COMPLEMENT BINARY
Output format	SERIAL
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC48,.27SQ,20
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
power supply	3/5,5 V
Certification status	Not Qualified
Sampling rate	1 MHz
Sample and hold/Track and hold	TRACK
Maximum seat height	1 mm
Nominal supply voltage	5 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn)
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7 mm

User Manual

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Data Sheet

FEATURES

1 MSPS, 14-Bit, Simultaneous Sampling

SAR ADC with PGA and Four Comparators

AD7264

FUNCTIONAL BLOCK DIAGRAM

REF

BUF

14-BIT

SUCCESSIVE

APPROXIMATION

ADC

Dual, simultaneous sampling, 14-bit, 2-channel ADC

True differential analog inputs

Programmable gain stage: ×1, ×2, ×3, ×4, ×6, ×8, ×12, ×16,

×24, ×32, ×48, ×64, ×96, ×128

Throughput rate per ADC

1 MSPS for

AD7264

Analog input impedance: >1 GΩ

Wide input bandwidth

−3 dB bandwidth: 1.7 MHz at gain = 2

4 on-chip comparators

SNR: 78 dB typical at gain = 2, 71 dB typical at gain = 32

Device offset calibration

System gain calibration

On-chip reference: 2.5 V

−40°C to +105°C operation

High speed serial interface

Compatible with SPI, QSPI™, MICROWIRE™, and DSP

48-lead LFCSP and LQFP packages

AD7264

OUTPUT

DRIVERS

–

PGA

T/H

OUT

CONTROL

LOGIC

SCLK

CAL

REFSEL

DRIVE

–

PGA

T/H

14-BIT

SUCCESSIVE

APPROXIMATION

ADC

BUF

OUTPUT

DRIVERS

OUT

PD0/D

PD1

PD2

REF

–

_GND

–

_GND

COMP

OUTPUT

DRIVERS

OUTPUT

DRIVERS

OUT

GENERAL DESCRIPTION

The

AD7264

is a dual, 14-bit, high speed, low power, successive

approximation ADC that operates from a single 5 V power supply

and features throughput rates of up to 1 MSPS per on-chip ADC.

Two complete ADC functions allow simultaneous sampling and

conversion of two channels. Each ADC is preceded by a true

differential analog input with a PGA. There are 14 gain settings

available: ×1, ×2, ×3, ×4, ×6, ×8, ×12, ×16, ×24, ×32, ×48, ×64,

×96, and ×128.

The

AD7264

contains four comparators. Comparator A and

Comparator B are optimized for low power, whereas Comparator C

and Comparator D have fast propagation delays. The

AD7264

features a calibration function to remove any device offset error

and programmable gain adjust registers to allow input path (for

example, sensor) offset and gain compensation. The

AD7264

has

an on-chip 2.5 V reference that can be disabled if an external

reference is preferred. The

AD7264

is available in 48-lead LFCSP

and LQFP packages.

The

AD7264

is ideally suited for monitoring small amplitude

signals from a variety of sensors. The devices include all the

functionality needed for monitoring the position feedback signals

from a variety of analog encoders used in motor control systems.

COMP

OUTPUT

DRIVERS

OUTPUT

DRIVERS

OUT

COMP

AGND

DGND

Figure 1.

PRODUCT HIGHLIGHTS

Integrated PGA with a variety of flexible gain settings to

allow detection and conversion of low level analog signals.

Each PGA is followed by a dual simultaneous sampling

ADC, featuring throughput rates of 1 MSPS per ADC. The

conversion result of both ADCs is simultaneously available

on separate data lines or in succession on one data line if

only one serial port is available.

Four integrated comparators that can be used to count

signals from pole sensors in motor control applications.

Internal 2.5 V reference.

Rev. E

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

Document Feedback

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Technical Support

www.analog.com

06732-001

AD7264

TABLE OF CONTENTS

Features .............................................................................................. 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Timing Specifications .................................................................. 6

Absolute Maximum Ratings............................................................ 7

ESD Caution .................................................................................. 7

Pin Configurations and Function Descriptions ........................... 8

Typical Performance Characteristics ........................................... 10

Terminology .................................................................................... 14

Theory of Operation ...................................................................... 15

Circuit Information .................................................................... 15

Comparators................................................................................ 15

Operation..................................................................................... 15

Analog Inputs .............................................................................. 15

DRIVE

............................................................................................ 16

Reference ..................................................................................... 16

Data Sheet

Typical Connection Diagrams .................................................. 17

Application Details ..................................................................... 20

Modes of Operation ....................................................................... 21

Pin Driven Mode ........................................................................ 21

Gain Selection ............................................................................. 21

Power-Down Modes .................................................................. 21

Control Register ......................................................................... 22

On-Chip Registers ...................................................................... 23

Serial Interface ................................................................................ 24

Calibration ....................................................................................... 26

Internal Offset Calibration ........................................................ 26

Adjusting the Offset Calibration Register ............................... 27

System Gain Calibration............................................................ 27

Applications Information .............................................................. 28

Grounding and Layout .............................................................. 28

PCB Design Guidelines for LFCSP .......................................... 28

Outline Dimensions ....................................................................... 29

Ordering Guide .......................................................................... 29

REVISION HISTORY

2/2018—Rev. D to Rev. E

Reorganized Layout ............................................................ Universal

Changed CP-48-4 to CP-48-1 ...................................... Throughout

Deleted AD7264-5 ......................................................... Throughout

Changes to Figure 4 .......................................................................... 8

Change to Table 4 ............................................................................. 9

Updated Outline Dimensions ....................................................... 29

Changes to Ordering Guide .......................................................... 29

5/2017—Rev. C to Rev. D

Changed CP-48-1 to CP-48-4 ...................................... Throughout

Changes to Figure 4 .......................................................................... 8

Updated Outline Dimensions ....................................................... 29

Changes to Ordering Guide .......................................................... 29

12/2015—Rev. B to Rev. C

Changes to Table 1 ............................................................................ 3

Changes to Figure 28 ...................................................................... 20

11/2012—Rev. A to Rev. B

Changes to Digital Input Voltage to DGND Parameter, Table 3 ...... 7

Updated Outline Dimensions ....................................................... 28

7/2008—Rev. 0 to Rev. A

Added AD7264-5................................................................ Universal

Added LQFP Package ........................................................ Universal

Changes to Figure 1 ...........................................................................1

Changes to Common-Mode Voltage Range, VCM Parameter......... 3

Changes to Table 3.............................................................................7

Changes to Pin Configuration and Function

Description Section ...........................................................................8

Changes to Figure 29...................................................................... 19

Updated Outline Dimensions ....................................................... 28

Changes to Ordering Guide .......................................................... 29

5/2008—Revision 0: Initial Version

Rev. E | Page 2 of 29

AD7264BCPZ Related Products

	AD7264BCPZ	EVAL-AD7264EDZ	AD7264BCPZ-5
Description	Analog to Digital Converters - ADC True Diff Dual 1MSPS 14-Bit 2-Ch SAR	Data Conversion IC Development Tools EVAL BRD AD7264	Analog to Digital Converters - ADC True Diff Dual 1MSPS 14-Bit 2-Ch SAR
Brand Name	Analog Devices Inc	-	Analog Devices Inc
Is it lead-free?	Contains lead	-	Contains lead
Is it Rohs certified?	conform to	-	conform to
Parts packaging code	QFN	-	QFN
package instruction	HVQCCN, LCC48,.27SQ,20	-	LFCSP-48
Contacts	48	-	48
Manufacturer packaging code	CP-48-1	-	CP-48-4
Reach Compliance Code	compliant	-	compliant
ECCN code	EAR99	-	EAR99
Maximum analog input voltage	3.3 V	-	3.755 V
Minimum analog input voltage	0.7 V	-	1.255 V
Maximum conversion time	0.56 µs	-	0.53 µs
Converter type	ADC, SUCCESSIVE APPROXIMATION	-	ADC, SUCCESSIVE APPROXIMATION
JESD-30 code	S-XQCC-N48	-	S-XQCC-N48
JESD-609 code	e3	-	e3
length	7 mm	-	7 mm
Maximum linear error (EL)	0.0183%	-	0.0183%
Humidity sensitivity level	3	-	3
Number of analog input channels	2	-	2
Number of digits	14	-	14
Number of functions	2	-	2
Number of terminals	48	-	48
Maximum operating temperature	105 °C	-	105 °C
Minimum operating temperature	-40 °C	-	-40 °C
Output bit code	2\'S COMPLEMENT BINARY	-	2'S COMPLEMENT BINARY
Output format	SERIAL	-	SERIAL
Package body material	UNSPECIFIED	-	UNSPECIFIED
encapsulated code	HVQCCN	-	HVQCCN
Encapsulate equivalent code	LCC48,.27SQ,20	-	LCC48,.27SQ,20
Package shape	SQUARE	-	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	-	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260	-	260
power supply	3/5,5 V	-	3/5,5 V
Certification status	Not Qualified	-	Not Qualified
Sampling rate	1 MHz	-	0.5 MHz
Sample and hold/Track and hold	TRACK	-	TRACK
Maximum seat height	1 mm	-	1 mm
Nominal supply voltage	5 V	-	5 V
surface mount	YES	-	YES
Temperature level	INDUSTRIAL	-	INDUSTRIAL
Terminal surface	Matte Tin (Sn)	-	Matte Tin (Sn)
Terminal form	NO LEAD	-	NO LEAD
Terminal pitch	0.5 mm	-	0.5 mm
Terminal location	QUAD	-	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	-	NOT SPECIFIED
width	7 mm	-	7 mm

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