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SY89321LMG-TR

Description
Translation - Voltage Levels
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size45KB,5 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Environmental Compliance
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SY89321LMG-TR Overview

Translation - Voltage Levels

SY89321LMG-TR Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerMicrochip
package instructionHVSON,
Reach Compliance Codecompliant
ECCN codeEAR99
Factory Lead Time6 weeks
maximum delay2.5 ns
Interface integrated circuit typePECL TO TTL TRANSLATOR
JESD-30 codeS-XDSO-N8
JESD-609 codee4
length2 mm
Humidity sensitivity level1
Number of digits1
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output latch or registerNONE
Output polarityTRUE
Package body materialUNSPECIFIED
encapsulated codeHVSON
Package shapeSQUARE
Package formSMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height0.9754 mm
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width2 mm
Micrel, Inc.
3.3V DIFFERENTIAL
LVPECL/CML/LVDS-to-LVTTL
TRANSLATOR
Precision Edge
®
SY89321L
Precision Edge
®
SY89321L
FEATURES
s
s
s
s
s
3.3V power supply
1.9ns typical propagation delay
275MHz f
MAX
Differential LVPECL/CML/LVDS inputs
24mA LVTTL outputs
Precision Edge
®
DESCRIPTION
The SY89321L is a differential LVPECL/CML/LVDS-
to-LVTTL translator requiring only a single +3.3V power.
The SY89321L is functionally equivalent to the
SY100EPT21L, but in an ultra-small 8-pin MLF
®
package
that features a 70% smaller footprint. This ultra-small
package and low skew single gate design make the
SY89321L ideal for applications that require the translation
of a clock or data signal where minimal space, low power
and low cost are critical.
V
BB
allows a differential, single-ended, or AC-coupled
interface to the device. If used, the V
BB
output should be
bypassed to V
CC
with 0.01µF capacitor.
Under open input conditions, the /IN will be biased at
a V
CC
/2 voltage level and the IN input will be pulled to
ground. This condition will force the Q output low to
provide added stability.
The SY89321L is compatible with positive ECL 100k
logic levels.
s
Flow-through pinouts
s
Internal input resistors: pulldown on IN, pulldown
and pullup on /IN
s
Q output will default LOW with inputs open
s
V
BB
output
s
Available in ultra-small 8-pin MLF
®
(2mm x 2mm)
package
BLOCK DIAGRAM
IN
LVPECL/
CML/LVDS
/IN
Q
LVTTL
Precision Edge is a registered trademark of Micrel, Inc.
MicroLeadFrame
and MLF are registered trademarks of Amkor Technology, Inc.
M9999-060208
hbwhelp@micrel.com or (408) 955-1690
Rev.: D
Amendment: /0
1
Issue Date: June 2008

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