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EM639165TS-7G

Description
8M x 16 bit Synchronous DRAM (SDRAM)
Categorystorage    storage   
File Size838KB,73 Pages
ManufacturerEtron
Websitehttp://www.etron.com/
Environmental Compliance
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EM639165TS-7G Overview

8M x 16 bit Synchronous DRAM (SDRAM)

EM639165TS-7G Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerEtron
package instructionTSOP2,
Reach Compliance Codecompli
access modeFOUR BANK PAGE BURST
Maximum access time5.4 ns
Other featuresAUTO/SELF REFRESH
JESD-30 codeR-PDSO-G54
length22.22 mm
memory density134217728 bi
Memory IC TypeSYNCHRONOUS DRAM
memory width16
Number of functions1
Number of ports1
Number of terminals54
word count8388608 words
character code8000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize8MX16
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Maximum seat height1.2 mm
self refreshYES
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationDUAL
width10.16 mm
EtronTech
Features
Fast access time from clock: 5/5.4 ns
Fast clock rate: 166/143 MHz
Fully synchronous operation
Internal pipelined architecture
2M word x 16-bit x 4-bank
Programmable Mode registers
- CAS# Latency: 2, or 3
- Burst Length: 1, 2, 4, 8, or full page
- Burst Type: interleaved or linear burst
- Burst stop function
Auto Refresh and Self Refresh
4096 refresh cycles/64ms
CKE power down mode
Single +3.3V power supply
Interface: LVTTL
54-pin 400 mil plastic TSOP II package
Lead-free package is available
EM639165
(Rev 1.6, 02/2007)
8Mega x 16 Synchronous DRAM (SDRAM)
Pin Assignment (Top View)
V DD
DQ0
V D DQ
DQ1
DQ2
V S SQ
DQ3
DQ4
V D DQ
DQ5
DQ6
V S SQ
DQ7
V DD
DQM L
/W E
/CA S
/RA S
/CS
BA0
BA1
A 1 0 (A P )
A0
A1
A2
A3
V DD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
V SS
DQ1 5
V S SQ
DQ1 4
DQ1 3
V D DQ
DQ1 2
DQ1 1
V S SQ
DQ1 0
DQ9
V D DQ
DQ8
V SS
NC
DQM U
CL K
CK E
NC
A11
A9
A8
A7
A6
A5
A4
V SS
Overview
The EM639165 SDRAM is a high-speed CMOS
synchronous DRAM containing 128 Mbits. It is internally
configured as 4 Banks of 2M word x 16 DRAM with a
synchronous interface (all signals are registered on the
positive edge of the clock signal, CLK). Read and write
accesses to the SDRAM are burst oriented; accesses
start at a selected location and continue for a
programmed number of locations in a programmed
sequence. Accesses begin with the registration of a
BankActivate command which is then followed by a
Read or Write command.
The EM639165 provides for programmable Read
or Write burst lengths of 1, 2, 4, 8, or full page, with a
burst termination option. An auto precharge function may
be enabled to provide a self-timed row precharge that is
initiated at the end of the burst sequence. The refresh
functions, either Auto or Self Refresh are easy to use.
By having a programmable mode register, the
system can choose the most suitable modes to
maximize its performance. These devices are well suited
for applications requiring high memory bandwidth and
particularly well suited to high performance PC
applications.
Key Specifications
EM639165
-
6/7
6/7 ns
5/5.4 ns
42/42 ns
60/63 ns
t
CK3
t
AC3
t
RAS
t
RC
Clock Cycle time(min.)
Access time from CLK(max.)
Row Active time(min.)
Row Cycle time(min.)
Ordering Information
Part Number
EM639165TS-6G
EM639165TS-6LG
EM639165TS-7G
EM639165TS-7LG
“L” indicates Low Power.
“G” indicates Lead-free
Frequency Package
166MHz
166MHz
143MHz
143MHz
TSOP II
TSOP II
TSOP II
TSOP II
Etron Technology, Inc.
No. 6, Technology Rd. V, Science-Based Industrial Park, Hsinchu, Taiwan 30077, R.O.C.
TEL: (886)-3-5782345
FAX: (886)-3-5778671
Etron Technology, Inc., reserves the right to make changes to its products and specifications without notice.

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