EM4102B6WT7 datasheet, PDF - EEWORLD Datasheet

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EM4102B6WT7: DescriptionRead Only Contactless Identification Device; File Size131KB，7 Pages; ManufacturerEMMICRO; Websitehttp://www.emmicroelectronic.com

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Read Only Contactless Identification Device

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EM MICROELECTRONIC

- MARIN SA

EM4102

Read Only Contactless Identification Device

Description

The EM4102 (previously named H4102) is a CMOS

integrated circuit for use in electronic Read Only RF

Transponders. The circuit is powered by an external coil

placed in an electromagnetic field, and gets its master

clock from the same field via one of the coil terminals. By

turning on and off the modulation current, the chip will

send back the 64 bits of information contained in a factor

programmed memory array.

The programming of the chip is performed by laser fusing

of polysilicon links in order to store a unique code on each

chip.

The EM4102 has several metal options which are used to

define the code type and data rate. Data rates of 64, 32

and 16 periods of carrier frequency per data bit are

available. Data can be coded as Manchester, Biphase or

PSK.

Due to low power consumption of the logic core, no

supply buffer capacitor is required. Only an external coil

is needed to obtain the chip function.

A parallel

resonance capacitor of 78 pF is also integrated.

Features

□

64 bit memory array laser programmable

Several options of data rate and coding available

On chip resonance capacitor

On chip supply buffer capacitor

On chip voltage limiter

Full wave rectifier on chip

Large modulation depth due to a low impedance

modulation device

Operating frequency 100 - 150 kHz

Very small chip size convenient for implantation

Very low power consumption

Applications

□

Animal implantable transponder

Animal ear tag

Industrial transponder

Typical Operating Configuration

Pin Assignment

Coil1

EM4102

Coil2

L: typical 20.8mH for fo = 125kHz

COIL1

COIL2

Fig. 1

VSS

EM4102

VDD

COIL2

COIL1

Coil terminal / Clock input

Coil terminal

Fig. 2

www.emmicroelectronic.com

EM4102

Absolute Maximum Ratings

Parameter

Maximum DC Current forced

on COIL1 & COIL2

Power Supply

Storage Temp. Die form

Storage Temp. PCB form

Electrostatic discharge

maximum to MIL-STD-883C

method 3015

Symbol

COIL

Conditions

±30mA

Handling Procedures

This device has built-in protection against high static

voltages or electric fields; however, anti-static precautions

must be taken as for any other CMOS component. Unless

otherwise specified, proper operation can only occur when

all terminal voltages are kept within the voltage range.

Unused inputs must always be tied to a defined logic

voltage level.

store

ESD

-0.3 to 7.5V

-55 to +200°C

-55 to +125°C

2000V

Operating Conditions

Parameter

Operating Temp.

Maximum Coil Current

Symbol Min

-40

COIL

coil

-10

100

14*

150

Typ

Max Units

+85

°C

Vpp

kHz

Stresses above these listed maximum ratings may cause

permanent damages to the device. Exposure beyond

specified operating conditions may affect device reliability

or cause malfunction.

AC Voltage on Coil

Supply Frequency

*) The AC Voltage on Coil is limited by the on chip voltage

limitation circuitry. This is according to the parameter I

coil

in the absolute maximum ratings.

System Principle

Tranceiver

Transponder

Coil1

Oscillator

Antenna

Driver

EM4102

Coil2

Filter

and

Gain

Demodulator

Data decoder

Data received

from transponder

Signal on coils

Transponder coil

Transeiver coil

RF Carrier

Data

Fig. 3

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EM4102

Electrical Characteristics

= 1.5V, V

= 0V,

= 134kHz square wave, T

= 25°C

= 1.0V with positive peak at V

and negative peak at V

-1V unless otherwise specified

Parameter

Supply Voltage

Rectified Supply Voltage

Coil1 - Coil2 Capacitance

Power Supply Capacitor

Manchester and biphase

versions

Supply Current

C2 pad Modulator ON

voltage drop

PSK version

Supply Current

C2 pad Modulator ON

voltage drop

Note 1)

Note 2)

Symbol Test Conditions

DDREC

res

sup

COIL1

- V

COIL2

= 2.8 VDC

Modulator switch = “ON”

coil

=100mVRMS f=10kHz

Min.

1.5

Typ.

Max.

Units

125

ONC2

=5.0V I

VDDC2

=1mA

with ref. to V

150

0.6

220

1.5

280

µA

DDPSK

ONC2PSK

=5.0V I

VDDC2

=100µA

with ref. to V

500

0.9

650

2.0

800

µA

The maximum voltage is defined by forcing 10mA on COIL1 - COIL2

The tolerance of the resonant capacitor is ± 15% over the whole production.

On a wafer basis, the tolerance is ± 2%

Timing Characteristics

= 1.5V, V

= 0V, f

coil

= 134kHz square wave, T

= 25°C

= 1.0V with positive peak at V

and negative peak at V

-1V unless otherwise specified

Timings are derived from the field frequency and are specified as a number of RF periods.

Parameter

Read Bit Period

Symbol

rdb

Test Conditions

depending on option

Value

64, 32, 16

Units

RF periods

Timing Waveforms

COIL1

64, 32 or 16 T

, depending on option

Serial Data Out

BIT n

BIT n+1

BIT n+2

Fig. 4

www.emmicroelectronic.com

EM4102

Block Diagram

CLOCK

EXTRACTOR

COIL1

VDD

AC1

Logic

Clock

Cress

FULL WAVE

RECTIFIER

AC2

Csup

SEQUENCER

MEMORY

ARRAY

COIL2

VSS

Serial

Data Out

DATA

MODULATOR

DATA

ENCODER

Modulation

Control

Fig. 5

Functional Description

General

The EM4102 is supplied by means of an electromagnetic

field induced on the attached coil. The AC voltage is

rectified in order to provide a DC internal supply voltage.

When the last bit is sent, the chip will continue with the

first bit until the power goes off.

Full Wave Rectifier

The AC input induced in the external coil by an incident

magnetic field is rectified by a Graetz bridge. The bridge

will limit the internal DC voltage to avoid malfunction in

strong fields.

Clock Extractor

One of the coil terminals (COIL1) is used to generate the

master clock for the logic function. The output of the clock

extractor drives a sequencer.

Sequencer

The sequencer provides all necessary signals to address

the memory array and to encode the serial data out.

Three mask programmed encoding versions of logic are

available. These three encoding types are Manchester,

biphase and PSK. The bit rate for the first and the second

type can be 64 or 32 periods of the field frequency. For

the PSK version, the bit rate is 16.

The sequencer receives its clock from the COIL1 clock

extractor and generates every internal signal controlling

the memory and the data encoder logic.

Data Modulator

The data modulator is controlled by the signal Modulation

Control in order to induce a high current in the coil. The

coil 2 transistor drives this high current. This will affect the

magnetic field according to the data stored in the memory

array.

The EM4102 contains 64 bits divided in five groups of

information. 9 bits are used for the header, 10 row parity

bits (P0-P9), 4 column parity bits (PC0-PC3), 40 data bits

(D00-D93), and 1 stop bit set to logic 0.

8 version bits or

customer ID

32 data bits

D00 D01

D10 D11

D20 D21

D30 D31

D40 D41

D50 D51

D60 D61

D70 D71

D80 D81

D90 D91

PC0 PC1

D02

D12

D22

D32

D42

D52

D62

D72

D82

D92

PC2

D03

D13

D23

D33

D43

D53

D63

D73

D83

D93

PC3

9 header bits

10 line parity

bits

4 column parity bits

The header is composed of the 9 first bits which are all

programmed to "1".

Due to the data and parity

organisation, this sequence cannot be reproduced in the

data string. The header is followed by 10 groups of 4 data

bits allowing 100 billion combinations and 1 even row

parity bit. Then, the last group consists of 4 event column

parity bits without row parity bit. S0 is a stop bit which is

written to "0"

Bits D00 to D03 and bits D10 to D13 are customer

specific identification.

These 64 bits are outputted serially in order to control the

modulator. When the 64 bits data string is outputted, the

output sequence is repeated continuously until power

goes off.

Memory Array for Manchester & Bi-Phase encoding

ICs

www.emmicroelectronic.com

EM4102

Memory Array for PSK encoding ICs

The PSK coded IC's are programmed with odd parity for

P0 and P1 and always with a logic zero.

The parity bits from P2 to P9 are even.

The column parity PC0 to PC3 are calculated including

the version bits and are even parity bits.

Code Description

Manchester

There is always a transition from ON to OFF or from OFF

to ON in the middle of bit period. At the transition from

logic bit “1” to logic bit “0” or logic bit “0” to logic bit “1” the

phase change. Value high of data stream presented

below modulator switch OFF, low represents switch ON

(see Fig. 6).

Biphase Code

At the beginning of each bit, a transition will occur. A logic

bit “1” will keep its state for the whole bit duration and a

logic bit “0” will show a transition in the middle of the bit

duration (see Fig. 7).

PSK Code

Modulation switch goes ON and OFF alternately every

period of carrier frequency. When a phase shift occurs, a

logical "0" is read from the memory. If no shift phase

occurs after a data rate cycle, a logical "1" is read (see

Fig. 8).

Manchester Code

Binary data

Memory output

Modulator control

Modulation control "low" means high current

Fig. 6

Biphase Code

Binary data

Memory output

Modulator control

Modulation control "low" means high current

Fig. 7

PSK Code

Serial Data Out

COIL1

Modulator control

"0" ON SERIAL OUT

"1" ON SERIAL OUT

Modulation control "low" means high current

Fig. 8

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