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EDI8L32512C17AI

Description
512K X 32 MULTI DEVICE SRAM MODULE, 15 ns, PQCC68
Categorystorage    storage   
File Size108KB,8 Pages
ManufacturerWhite Electronic Designs Corporation
Websitehttp://www.wedc.com/
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EDI8L32512C17AI Overview

512K X 32 MULTI DEVICE SRAM MODULE, 15 ns, PQCC68

EDI8L32512C17AI Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerWhite Electronic Designs Corporation
package instructionPLASTIC, MO-47AE, LCC-68
Reach Compliance Codeunknow
Maximum access time17 ns
I/O typeCOMMON
JESD-30 codeS-PQCC-J68
JESD-609 codee0
length24.2316 mm
memory density16777216 bi
Memory IC TypeSRAM MODULE
memory width32
Number of functions1
Number of terminals68
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize512KX32
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC68,1.0SQ
Package shapeSQUARE
Package formCHIP CARRIER
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Maximum seat height4.572 mm
Maximum standby current0.04 A
Minimum standby current4.75 V
Maximum slew rate0.72 mA
Maximum supply voltage (Vsup)5.25 V
Minimum supply voltage (Vsup)4.75 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width24.2316 mm

EDI8L32512C17AI Preview

White Electronic Designs
512Kx32 CMOS High Speed Static RAM
FEATURES
DSP Memory Solution
Motorola DSP96002
Analog SHARC DSP
Texas Instruments TMS320C3x, TMS320C4x
Random Access Memory Array
Fast Access Times: 12*, 15, 17, and 20ns
TTL Compatible I/O
Fully Static, No Clocks
Surface Mount Package
68 Lead PLCC, No. 99 JEDEC M0-47AE
Small Footprint, 0.990 Sq. In.
Multiple Ground Pins for Maximum Noise Immunity
Single +5V (±5%) Supply Operation
* Advanced Information
EDI8L32512C
DESCRIPTION
The EDI8L32512C is a high speed, 5V, 16Mb SRAM. The
device is available with access times of 12, 15, 17 and
20ns allowing the creation of a no wait state DSP memory
solution. The high speed, 5v supply voltage and control lines
make the divice ideal for creating floating point DSP memory
solutions.
The device can be configured as a 512K x 32 and used to
create a single chip external data memory solution for TI's
TMS320C30/C31 (Figure 8), TMS320C32 (Figure 9) or
TMS320C4x (Figure 10), Motorola's DSP96002 and Analog's
SHARC DSP (Figure 11). Alternatively, the device's chip
enables can be used to configure it as a 1M x 16. A 1M x 48
program memory array for Analog's SHARC DSP is created
using three devices (Figure 12). If this memory is too deep,
two 512K x 24s (EDI8L24512C) can be used to create a 512K
x 48 array or two 128K x 48 array.
The device provides a 56% space savings when compared
to four 512K x 8, 36 pin SOJs. In addition the EDI8L32512C
has only a 10pF load on the data lines vs. 32pF for four
plastic SOJs.
The device provides a memory upgrade of the EDI8L32256C
(256K x 32) or the EDI8L32128C (128K x 32). For additional
upgrade information see Figure 13.
Note: Solder Reflow Temperature should not exceed 230°C for 10 seconds.
FIG. 1 PIN CONFIGURATIONS AND BLOCK DIAGRAM
DQ16
A18
A17
E3#
E2#
E1#
E0#
NC
VCC
NC
NC
G#
W#
A16
A15
A14
DQ15
PIN NAMES
A0-A18
E0#-E3#
W#
G#
DQ0-DQ31
V
CC
V
SS
NC
Address Inputs
Chip Enables
Write Enables
Output Enable
Common Data Input/Output
Power (+5V ±10%)
Ground
No Connection
BYTE CONTROL
TABLE
Chip
Enable
E0#
E1#
E2#
E3#
Byte
Control
DQ0-7
DQ8-15
DQ16-23
DQ24-31
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
DQ17 10
DQ18 11
DQ19 12
V
SS
13
DQ20 14
DQ21 15
DQ22 16
DQ23 17
V
CC
18
DQ24 19
DQ25 20
DQ26 21
DQ27 22
V
SS
23
DQ28 24
DQ29 25
DQ30 26
DQ14
DQ13
DQ12
V
SS
DQ11
DQ10
DQ9
DQ8
V
CC
DQ7
DQ6
DQ5
DQ4
V
SS
DQ3
DQ2
DQ1
Note: For memory upgrade information, refer to Pg 8, Fig 13 "EDI MCM-L Upgrade Path"
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August 2000
Rev. 7
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
DQ31
A6
A5
A4
A3
A2
A1
A0
V
CC
A13
A12
A11
A10
A9
A8
A7
DQ0
A0-18
19
G#
W#
E0#
E1#
E2#
E3#
512K x 32
Memory
Array
DQ0-DQ7
DQ8-DQ15
DQ16-DQ23
DQ24-DQ31
White Electronic Designs
ABSOLUTE MAXIMUM RATINGS*
Voltage on any pin relative to V
SS
Operating Temperature t
A
(Ambient)
Commercial
Industrial
Storage Temperature, Plastic
Power Dissipation
Output Current
Junction Temperature, TJ
-0.5V to 7.0V
0°C to +70°C
-40°C to +85°C
-55°C to +125°C
5.0 Watts
20 mA
175°C
EDI8L32512C
RECOMMENDED DC OPERATING CONDITIONS
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
Sym
V
CC
V
SS
V
IH
V
IL
Min
4.75
0
2.2
-0.3
Typ
5.0
0
--
--
Max
5.25
0
V
CC
+0.5V
0.8
Units
V
V
V
V
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
Note: For t
EHQZ
,t
GHQZ
and t
WLQZ
, CL = 5pF)
*Stress greater than those listed under "Absolute Maximum Ratings"
may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other
conditions greater than those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
V
SS
to 3.0V
5ns
1.5V
Figure 2
FIG. 2
Vcc
FIG. 3
480Ω
Vcc
480Ω
Q
255Ω
30pF
Q
255Ω
5pF
DC ELECTRICAL CHARACTERISTICS
Parameter
Operating Power Supply Current
Standby (TTL) Power Supply Current
Full Standby Power Supply Current
CMOS
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Sym
I
CC1
I
CC2
I
CC3
I
LI
I
LO
V
OH
V
OL
Conditions
W# = V
IL
, I
I/O
= 0mA, Min Cycle
E# ≥ V
IH
, V
IN
≤ V
IL
or V
IN
≥V
IH
, f = 0MHz
E# ≥ V
CC
-0.2V
V
IN
≥ V
CC
-0.2V or V
IN
≤ 0.2V
V
IN
= 0V to V
CC
V I/O = 0V to V
CC
I
OH
= -4.0mA
I
OL
= 8.0mA
Min
Max
12-25
800
200
40
±10
±10
2.4
0.4
17/20
720
200
40
Units
ns
mA
mA
mA
µA
µA
V
V
TRUTH TABLE
G#
X
H
L
X
August 2000
Rev. 7
CAPACITANCE
Power
I
CC2
I
CC3
I
CC1
I
CC1
I
CC1
2
E#
H
L
L
L
W#
X
H
H
L
Mode
Standby
Output Deselect
Read
Write
Output
HIGH Z
HIGH Z
D
OUT
D
IN
(f=1.0MHz, V
IN
=V
CC
or V
SS
)
Parameter
Sym
Address Lines
CI
Data Lines
CD/Q
Write & Output Enable Line W#, G#
Chip Enable Line
E0#-E3#
Max
30
10
30
8
Unit
pF
pF
pF
pF
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
AC CHARACTERISTICS READ CYCLE
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access
Chip Enable to Output in Low Z (1)
Chip Disable to Output in High Z (1)
Output Hold from Address Change
Output Enable to Output Valid
Output Enable to Output in Low Z (1)
Output Disable to Output in High Z (1)
*Advanced Information
Note: 1. Parameter guaranteed, but not tested.
EDI8L32512C
Symbol
JEDEC
t
AVAV
t
AVQV
t
ELQV
t
ELQX
t
EHQZ
t
AVQX
t
GLQV
t
GLQX
t
GHQZ
Alt.
t
RC
t
AA
t
ACS
t
CLZ
t
CHZ
t
OH
t
OE
t
OLZ
t
OHZ
12ns*
Min
12
Max
12
12
3
6
3
6
0
6
0
3
3
15ns
Min
15
Max
15
15
3
7
3
7
0
7
17ns
Min
17
Max
17
17
3
9
3
9
0
9
Min
20
20ns
Max
20
20
9
9
9
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
FIG. 4
READ CYCLE 1 - W# HIGH, G#, E# LOW
t
AVAV
A
ADDRESS 1
t
AVQV
Q
ADDRESS 2
t
AVQX
DATA 1
DATA 2
FIG. 5
READ CYCLE 2 - W# HIGH
t
AVAV
A
t
AVQV
E#
t
ELQV
t
ELQX
G#
t
GLQV
t
GLQX
Q
t
GHQZ
t
EHQZ
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August 2000
Rev. 7
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
AC CHARACTERISTICS WRITE CYCLE
Parameter
Write Cycle Time
Chip Enable to End of Write
Address Setup Time
Address Valid to End of Write
Write Pulse Width
Write Recovery Time
Data Hold Time
Write to Output in High Z (1)
Data to Write Time
Output Active from End of Write (1)
Symbol
JEDEC
t
AVAV
t
ELWH
t
ELEH
t
AVWL
t
AVEL
t
AVWH
t
AVEH
t
WLWH
t
ELEH
t
WHAX
t
EHAX
t
WHDX
t
EHDX
t
WLQZ
t
DVWH
t
DVEH
t
WHQX
Alt.
t
WC
t
CW
t
CW
t
AS
t
AS
t
AW
t
AW
t
WP
t
WP
t
WR
t
WR
t
DH
t
DH
t
WHZ
t
DW
t
DW
t
WLZ
12ns
Min
12
8
8
0
0
8
8
8
10
0
0
0
0
0
6
6
3
Max
15ns
Min
15
10
10
0
0
10
10
10
12
0
0
0
0
0
7
7
3
Max
17ns
Min
17
11
11
0
0
11
11
11
13
0
0
0
0
0
8
8
3
Max
EDI8L32512C
20ns
Min
20
12
12
0
0
12
12
12
14
0
0
0
0
0
9
9
3
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
6
7
8
9
*Advanced Information.
Note 1: Parameter guaranteed, but not tested.
FIG. 6
WRITE CYCLE 1 - W# CONTROLLED
t
AVAV
A
E#
t
ELWH
t
AVWH
t
WLWH
W#
D
t
WLQZ
Q
HIGH Z
t
AVWL
t
DVWH
t
WHDX
t
WHQX
DATA VALID
t
WHAX
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August 2000
Rev. 7
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
White Electronic Designs
FIG. 7
WRITE CYCLE 2 - E# CONTROLLED
t
AVAV
A
t
AVEL
E
t
AVEH
t
WLEH
W#
t
DVEH
D
Q
HIGH Z
t
EHDX
DATA VALID
EDI8L32512C
t
ELEH
t
EHAX
ORDERING INFORMATION
Commercial (0°C to +70°C)
Industrial (-40°C to +85°C)
Part Number
EDI8L32512C12AC*
EDI8L32512C15AC
EDI8L32512C17AC
EDI8L32512C20AC
Speed
(ns)
12
15
17
20
Package
No.
99
99
99
99
Part Number
EDI8L32512C15AI*
EDI8L32512C17AI
EDI8L32512C20AI
Speed
(ns)
15
17
20
Package
No.
99
99
99
PACKAGE DRAWING
Package No. 99
68 Lead PLCC
JEDEC MO-47AE
Weight = 4.2g
Theta J
A
= 40°C/W
Theta J
C
= 15°C/W
0.995
Max
0.956
Max
Package No. 99
68 lead PLCC
0.180
Max
0.995 0.956
Max Max
0.020
0.015
0.050
BSC
0.040
Max
0.930
0.890
0.115
Max
Coplanarity (lowest lead to highest lead)0.004
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
August 2000
Rev. 7
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com

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EDI8L32512C17AI EDI8L32512C EDI8L32512C12AC
Description 512K X 32 MULTI DEVICE SRAM MODULE, 15 ns, PQCC68 512K X 32 MULTI DEVICE SRAM MODULE, 15 ns, PQCC68 512K X 32 MULTI DEVICE SRAM MODULE, 15 ns, PQCC68
length 24.2316 mm 24.23 mm 24.2316 mm
memory width 32 32 32
Number of functions 1 1 1
Number of terminals 68 68 68
Maximum operating temperature 85 °C 70 Cel 70 °C
Minimum operating temperature -40 °C 0.0 Cel -
organize 512KX32 512KX32 512KX32
surface mount YES YES YES
Temperature level INDUSTRIAL COMMERCIAL COMMERCIAL
Terminal form J BEND J BEND J BEND
Terminal location QUAD QUAD QUAD
width 24.2316 mm 24.23 mm 24.2316 mm
Is it Rohs certified? incompatible - incompatible
Maker White Electronic Designs Corporation - White Electronic Designs Corporation
package instruction PLASTIC, MO-47AE, LCC-68 - PLASTIC, MO-47AE, LCC-68
Reach Compliance Code unknow - unknow
Maximum access time 17 ns - 12 ns
I/O type COMMON - COMMON
JESD-30 code S-PQCC-J68 - S-PQCC-J68
JESD-609 code e0 - e0
memory density 16777216 bi - 16777216 bi
Memory IC Type SRAM MODULE - SRAM MODULE
word count 524288 words - 524288 words
character code 512000 - 512000
Operating mode ASYNCHRONOUS - ASYNCHRONOUS
Output characteristics 3-STATE - 3-STATE
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY
encapsulated code QCCJ - QCCJ
Encapsulate equivalent code LDCC68,1.0SQ - LDCC68,1.0SQ
Package shape SQUARE - SQUARE
Package form CHIP CARRIER - CHIP CARRIER
Parallel/Serial PARALLEL - PARALLEL
Peak Reflow Temperature (Celsius) NOT SPECIFIED - NOT SPECIFIED
power supply 5 V - 5 V
Certification status Not Qualified - Not Qualified
Maximum seat height 4.572 mm - 4.572 mm
Maximum standby current 0.04 A - 0.04 A
Minimum standby current 4.75 V - 4.75 V
Maximum slew rate 0.72 mA - 0.8 mA
Maximum supply voltage (Vsup) 5.25 V - 5.25 V
Minimum supply voltage (Vsup) 4.75 V - 4.75 V
Nominal supply voltage (Vsup) 5 V - 5 V
technology CMOS - CMOS
Terminal surface Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb)
Terminal pitch 1.27 mm - 1.27 mm
Maximum time at peak reflow temperature NOT SPECIFIED - NOT SPECIFIED
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