26cm COLOUR TFT-LCD MODULE
(10.4 TYPE)
LIQUID CRYSTAL DISPLAY DIVISION
PRODUCT INFORMATION
FEATURES
(1) 10.4”SVGA display size for notebook PC
(2) LVDS interface system
(3) Slim(5.2mmMAX)
LTM10C348S
(p-Si TFT)
TENTATIVE
Specifications
242.4(W) x 173.2(H) x 5.2max(D) mm
800(W) x 600(H) pixels
211.2(W) x 158.4(H) mm
0.264(W) x 0.264(H)
(265)±20 g
Single CCFL, Sidelight type
MECHANICAL SPECIFICATIONS
Item
Dimensional Outline (Typ.)
Number of Pixels
Active Area
Pixel Pitch
Weight (approximately)
Backlight
ABSOLUTE MAXIMUM RATINGS
Item
Supply Voltage
(V
DD
)
(V
FL
)
FL Driving Frequency (f
FL
)
Input Signal Voltage (V
IN
)
Operating Temperature
Storage Temperature
Storage Humidity
Min.
-0.3
-
-
-0.3
0
-20
10
Max.
4.0
2.0
100
V
DD
+0.3
50
60
90
Unit
V
kV(rms)
kHz
V
°C
°C
%(RH)
ELECTRICAL SPECIFICATION
Item
Supply Voltage
(V
DD
)
(V
FL
)
Min.
3.0
560
1200
0
---
V
OS
-0.1
---
2.5
---
Typ.
3.3
610
-
---
---
---
250
4.2
3.4
Max.
3.6
660
1600
2.4
V
OS
+0.1
---
390
6.0
---
Unit
V
V(rms)
V(rms)
V
V
V
mA
mA(rms)
W
Remarks
I
FL
=4.2 mA(rms)
FL Start Voltage (Ta=0°C)
Receiver Input Voltage
Differential Input High Threshold(V
TH
)*1
Differential Input Low Threshold(V
TL
)*1
Current Consumption
*2 (I
DD
)
*3 (I
FL
)
*2 *3 Power Consumption
V
OS
:Offset Mode Voltage
V
OS
=+1.2V
@130cd/m
2
*1 : Refer to DF90CF364 Specification by National Semiconductor Corporation. This LCD module conforms to LVDS
standard (TIA/EIA-644)
*2 : 8 color bars pattern
*3 : Excepting the efficiency FL inverter
*4: Not use Hsync nor Vsync. Only ENAB control.
OPTICAL SPECIFICATION
(Ta=25°C)
Item
Contrast Ratio (CR)
Response Time
Luminance
(L)
Min.
100
---
---
90
(150)
Typ.
250
---
---
130
(190)
Max.
---
50
50
---
---
Unit
---
ms
ms
cd/m
2
cd/m
2
Remarks
(t
ON
)
(t
OFF
)
I
FL
=4.2mA(rms)
I
FL
=6.0mA(rms)
*The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
Toshiba or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Toshiba or others.
*The information contained herein may be changed without prior notice. It is therefore advisable to contact Toshiba before
proceeding with the design of equipment incorporating this product.
(1/10)
2000-02-18 (Ver.2.4)
(1) Vertical Timing
t
1
t
2
TIMING CHART
NCLK
t
3
t
3
ENAB
X,1
X,4
X,598
X,599
X,600
X,Y
X,2
X,3
R5-R0
G5-G0
B5-B0
(2) Horizontal Timing
t
3
t
4
t
5
(4/10)
797,Y
1,Y 2,Y 3,Y 4,Y 5,Y 6,Y 7,Y
X,Y
798,Y
800,Y
799,Y
NCLK
ENAB
R5-R0
G5-G0
B5-B0
t
5
NCLK
V
IH
=(MIN):0.8
V
DD
(V)
V
IL
=(MAX):0.2
V
DD
(V)
Input Signal Center Level : 0.5
V
DD
(V)
2000-02-18 (Ver.2.4)
ENAB
R5 -
G5 -
B5 -
R0
G0
B0
LTM10C348S
V
IH
=(MIN):0.8
V
DD
(V)
V
IL
=(MAX):0.2
V
DD
(V)
LTM10C348S
TIMING SPECIFICATION
1)2) 3) 4)5)
Item
Frame Period
Vertical
Display Term
One Line Scanning
Time
Horizontal
Display Term
Clock Period
Symbol
t1
t2
t3
t4
t5
Min.
604
×
t3
-
600
×
t3
958
×
t5
26.3
800
×
t5
24.7
Typ.
628
×
t3
16.58
600
×
t3
1056
×
t5
26.4
800
×
t5
25.0
Max.
677
×
t3
17.86
600
×
t3
1064
×
t5
800
×
t5
27.8
-
ns
Unit
-
ms
-
-
µs
Remarks
Note 1) Refer to TIMING CHART and LVDS (DF90CF364MTD) specifications by National Semiconductor.
Note 2) If ENAB is fixed to "H" or "L" level for certain period while NCLK is supplied, the panel displays black with some
flicker.
Note 3) If NCLK is fixed to "H" or "L" level for certain period while ENAB is supplied, the panel may be damaged.
Note 4) Please adjust LCD operating signal timing and FL driving frequency, to optimize the display quality.
There is a possibility that flicker is observed by the interference of LCD operating signal timing and FL driving
Condition (especially driving frequency ), even if the condition satisfies above timing specifications and
recommended operating conditions shown in 3.
Note 5) Do not make
t1,t2
and
t3
fluctuate.
If
t1,t2
and
t3
are fluctuate, the panel displays black.
Notes 6) Do not hold NCLK on “H” level nor “L” level during VDD(+3.3V) Is supplied.
When it holds on, DC voltage
supplies to liquid crystal materials and it may cause damage to liquid crystal materials.
SEQUENCE OF POWER SUPPLIES AND SIGNALS
10ms(Max.)
3.0V
10ms(Max.)
3.0V
40ms(Max.)
0ms(Min.)
500ms(Min.)
V
DD
NCLK
ENAB
DATA
0.2V
40ms(Max.)
0ms(Min.)
0.2V
0.2V
0.2
V
DD
0.2
V
DD
(5/10)
2000-02-18 (Ver.2.4)
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