TC74ACT245,640P/F/FT
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74ACT245P,TC74ACT245F,TC74ACT245FT
TC74ACT640P,TC74ACT640F,TC74ACT640FT
Octal Bus Transceiver
TC74ACT245P/F/FT
TC74ACT640P/F/FT
3-State,
Non-Inverting
3-State, Inverting
TC74ACT245P, TC74ACT640P
The TC74ACT245 and 640 are advanced high speed CMOS
OCTAL BUS TRANSCEIVERs fabricated with silicon gate and
double-layer metal wiring C
2
MOS technology.
They achieve the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
These devices may be used as a level converter for interfacing
TTL or NMOS to High Speed CMOS. The inputs are compatible with
TTL, NMOS and CMOS output voltage levels.
They are intended for two-way asynchronous communication
between data busses. The direction of data transmission is
determined by the level of the DIR input.
The enable input (
G
) can be used to disable the device so that
the busses are effectively isolated.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
TC74ACT245F, TC74ACT640F
TC74ACT245FT, TC74ACT640FT
Features (Note 1) (Note 2)
•
•
•
•
High speed: t
pd
=
4.7 ns (typ.) at V
CC
=
5 V
Low power dissipation: I
CC
=
8
μA
(max) at Ta
=
25°C
Compatible with TTL outputs
:
V
IL
=
0.8 V (max), V
IH
=
2.0 V (min)
Symmetrical output impedance
: |I
OH
|
=
I
OL
=
24 mA (min)
Capability of driving 50
Ω
transmission lines.
∼
Balanced propagation delays: t
pLH
−
t
pHL
Pin and function compatible with 74F245/640
Note 1: Do not apply a signal to any bus terminal when it is in the output mode. Damage may result.
Note 2: All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull
down resistors.
Weight
DIP20-P-300-2.54A
SOP20-P-300-1.27A
TSSOP20-P-0044-0.65A
: 1.30 g (typ.)
: 0.22 g (typ.)
: 0.08 g (typ.)
•
•
1
2007-10-01
TC74ACT245,640P/F/FT
Truth Table
Inputs
Function
A Bus
Output
Input
Z
Outputs
B Bus
Input
Output
G
L
L
H
DIR
L
H
X
ACT245
A=B
B=A
Z
ACT640
A=
B
B= A
Z
X: Don’t care
Z: High impedance
Absolute Maximum Ratings (Note 1)
Characteristics
Supply voltage range
DC input voltage
DC output voltage
Input diode current
Output diode current
DC output current
DC V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
Rating
−0.5
to 7.0
−0.5
to V
CC
+ 0.5
−0.5
to V
CC
+ 0.5
±20
±50
±50
±200
500 (DIP) (Note 2)/180 (SOP/TSSOP)
−65
to 150
Unit
V
V
V
mA
mA
mA
mA
mW
°C
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta =
−40°C
to 65°C. From Ta = 65°C to 85°C a derating factor of
−10
mW/°C
should be applied up to 300 mW.
Operating Range
(Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Operating temperature
Input rise and fall time
Symbol
V
CC
V
IN
V
OUT
T
opr
dt/dV
Rating
4.5 to 5.5
0 to V
CC
0 to V
CC
−40
to 85
0 to 10
Unit
V
V
V
°C
ns/V
Note:
The operating range is required to ensure the normal operation of the device. Unused inputs and bus inputs
must be tied to either VCC or GND. Please connect both bus inputs and the bus outputs with VCC or GND
when the I/O of the bus terminal changes by the function. In this case, please note that the output is not
short-circuited.
3
2007-10-01
TC74ACT245,640P/F/FT
AC Characteristics
(C
L
= 50 pF, R
L
= 500
Ω,
input: t
r
= t
f
= 3 ns)
Characteristics
Symbol
t
pLH
t
pHL
t
pLH
t
pHL
t
pZL
t
pZH
t
pLZ
t
pHZ
C
IN
C
I/O
C
PD
DIR, G
A
n
, Bn
TC74ACT245
Test Condition
V
CC
(V)
Propagation delay
time
(Note 2)
Propagation delay
time
(Note 3)
Output enable time
―
5.0 ± 0.5
Min
―
Ta = 25°C
Typ.
5.0
Max
8.0
Ta =
−40
to 85°C
Min
1.0
Max
9.0
ns
Unit
―
5.0 ± 0.5
―
5.7
8.5
1.0
9.5
ns
―
5.0 ± 0.5
―
7.3
12.3
1.0
14.0
ns
Output disable time
Input capacitance
Bus input capacitance
Power dissipation
capacitance
―
5.0 ± 0.5
―
―
―
―
―
6.3
5
13
38
43
9.7
10
―
―
―
1.0
―
―
―
―
11.0
10
―
―
―
ns
pF
pF
pF
(Note 1) TC74ACT640
Note 1: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
I
CC (opr)
= C
PD
·V
CC
·f
IN
+ I
CC
/8 (per bit)
Note 2: For TC74ACT245 only
Note 3: For TC74ACT640 only
5
2007-10-01
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