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IDT71V016SA12BFG18

Description
Standard SRAM, 64KX16, 12ns, CMOS, PBGA48, 7 X 7 MM, ROHS COMPLIANT, PLASTIC, FBGA-48
Categorystorage   
File Size482KB,9 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
Download Datasheet Parametric View All

IDT71V016SA12BFG18 Overview

Standard SRAM, 64KX16, 12ns, CMOS, PBGA48, 7 X 7 MM, ROHS COMPLIANT, PLASTIC, FBGA-48

IDT71V016SA12BFG18 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeBGA
package instructionLFBGA, BGA48,6X8,30
Contacts48
Reach Compliance Codecompliant
ECCN code3A991.B.2.B
Maximum access time12 ns
I/O typeCOMMON
JESD-30 codeS-PBGA-B48
JESD-609 codee1
length7 mm
memory density1048576 bit
Memory IC TypeSTANDARD SRAM
memory width16
Humidity sensitivity level3
Number of functions1
Number of terminals48
word count65536 words
character code64000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
organize64KX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeLFBGA
Encapsulate equivalent codeBGA48,6X8,30
Package shapeSQUARE
Package formGRID ARRAY, LOW PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Certification statusNot Qualified
Maximum seat height1.34 mm
Maximum standby current0.005 A
Minimum standby current3 V
Maximum slew rate0.11 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin/Silver/Copper (Sn/Ag/Cu)
Terminal formBALL
Terminal pitch0.75 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperature30
width7 mm
Base Number Matches1
3.3V CMOS Static RAM
for Automotive Applications
1 Meg (64K x 16-Bit)
Features
IDT71V016SA
Description
The IDT71V016 is a 1,048,576-bit high-speed Static RAM organized
as 64K x 16. It is fabricated using IDT’s high-perfomance, high-reliability
CMOS technology. This state-of-the-art technology, combined with inno-
vative circuit design techniques, provides a cost-effective solution for high-
speed memory needs and automotive applications.
The IDT71V016 has an output enable pin which operates as fast
as 5ns, with address access times as fast as 10ns. All bidirectional
inputs and outputs of the IDT71V016 are LVTTL-compatible and operation
is from a single 3.3V supply. Fully static asynchronous circuitry is used,
requiring no clocks or refresh for operation.
The IDT71V016 is packaged in a JEDEC standard 44-pin Plastic
SOJ, a 44-pin TSOP Type II, and a 48-ball plastic 7 x 7 mm FBGA.
64K x 16 advanced high-speed CMOS Static RAM
Equal access and cycle times
— Automotive: 12/15/20ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly
LVTTL-compatible
Low power consumption via chip deselect
Upper and Lower Byte Enable Pins
Single 3.3V power supply
Available in 44-pin Plastic SOJ, 44-pin TSOP, and
48-Ball Plastic FBGA packages
Functional Block Diagram
Output
Enable
Buffer
OE
A
0
– A
15
Address
Buffers
Row / Column
Decoders
I/O
15
Chip
Enable
Buffer
Sense
Amps
and
Write
Drivers
8
Low
Byte
I/O
Buffer
8
8
High
Byte
I/O
Buffer
8
CS
I/O
8
WE
Write
Enable
Buffer
64K x 16
Memory
Array
16
I/O
7
I/O
0
BHE
Byte
Enable
Buffers
BLE
6818 drw 01
DECEMBER 2004
1
©2004 Integrated Device Technology, Inc.
DSC-6818/00
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