dsPIC33F/PIC24H
dsPIC33F/PIC24H Flash Programming Specification
1.0
DEVICE OVERVIEW
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PIC24HJ128GP306
PIC24HJ128GP310
PIC24HJ128GP506
PIC24HJ128GP510
PIC24HJ256GP206
PIC24HJ256GP210
PIC24HJ256GP610
dsPIC33FJ12GP201
dsPIC33FJ12GP202
dsPIC33FJ12MC201
dsPIC33FJ12MC202
PIC24HJ12GP201
PIC24HJ12GP202
This document defines the programming specification
for the dsPIC33F 16-bit Digital Signal Controller (DSC)
and PIC24H 16-bit Microcontroller (MCU) families. This
programming specification is required only for those
developing programming support for the dsPIC33F/
PIC24H family. Customers only using one of these
devices should use development tools that already
provide support for device programming.
This document includes programming specifications
for the following devices:
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dsPIC33FJ64GP206
dsPIC33FJ64GP306
dsPIC33FJ64GP310
dsPIC33FJ64GP706
dsPIC33FJ64GP708
dsPIC33FJ64GP710
dsPIC33FJ128GP206
dsPIC33FJ128GP306
dsPIC33FJ128GP310
dsPIC33FJ128GP706
dsPIC33FJ128GP708
dsPIC33FJ128GP710
dsPIC33FJ256GP506
dsPIC33FJ256GP510
dsPIC33FJ256GP710
dsPIC33FJ64MC506
dsPIC33FJ64MC508
dsPIC33FJ64MC510
dsPIC33FJ64MC706
dsPIC33FJ64MC710
dsPIC33FJ128MC506
dsPIC33FJ128MC510
dsPIC33FJ128MC706
dsPIC33FJ128MC708
dsPIC33FJ128MC710
dsPIC33FJ256MC510
dsPIC33FJ256MC710
PIC24HJ64GP206
PIC24HJ64GP210
PIC24HJ64GP506
PIC24HJ64GP510
PIC24HJ128GP206
PIC24HJ128GP210
2.0
PROGRAMMING OVERVIEW
OF THE dsPIC33F/PIC24H
There are two methods of programming the dsPIC33F/
PIC24H family of devices discussed in this
programming specification. They are:
• In-Circuit Serial Programming™ (ICSP™)
programming capability
• Enhanced In-Circuit Serial Programming
The ICSP programming method is the most direct
method to program the device; however, it is also the
slower of the two methods. It provides native, low-level
programming capability to erase, program and verify
the chip.
The Enhanced ICSP protocol uses a faster method that
takes advantage of the programming executive, as
illustrated in Figure 2-1. The programming executive
provides all the necessary functionality to erase, pro-
gram and verify the chip through a small command set.
The command set allows the programmer to program
the dsPIC33F/PIC24H Programming Specification
devices without having to deal with the low-level
programming protocols of the chip.
©
2007 Microchip Technology Inc.
Preliminary
DS70152D-page 1
dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
FIGURE 2-1:
PROGRAMMING SYSTEM
OVERVIEW FOR
ENHANCED ICSP™
dsPIC33F/PIC24H
Programmer
Programming
Executive
FIGURE 2-2:
CONNECTIONS FOR THE
ON-CHIP REGULATOR
3.3V
dsPIC33F/PIC24H
V
DD
V
DDCORE
C
F
On-Chip Memory
V
SS
Note 1:
This specification is divided into major sections that
describe the programming methods independently.
Section 3.0 “Device Programming – Enhanced
ICSP”
describes the Enhanced ICSP method.
Section 5.0 “Device Programming – ICSP”
describes
the ICSP method.
These are typical operating voltages. Refer
to
Section TABLE 8-1: “AC/DC Charac-
teristics and Timing Requirements”
for
the full operating ranges of V
DD
and
2.2
2.1
Power Requirements
Program Memory Write/Erase
Requirements
All devices in the dsPIC33F/PIC24H family are dual volt-
age supply designs: one supply for the core and another
for the peripherals and I/O pins. A regulator is provided
on-chip to alleviate the need for two external voltage
supplies.
All of the dsPIC33F/PIC24H devices power their core
digital logic at a nominal 2.5V. To simplify system
design, all devices in the dsPIC33F/PIC24H Program-
ming Specification family incorporate an on-chip regu-
lator that allows the device to run its core logic from
V
DD
.
The regulator provides power to the core from the other
V
DD
pins. A low-ESR capacitor (such as tantalum) must
be connected to the V
DDCORE
pin (Figure 2-2). This
helps to maintain the stability of the regulator. The
specifications for core voltage and capacitance are
listed in
Section TABLE 8-1: “AC/DC Characteristics
and Timing Requirements”.
The program Flash memory on the dsPIC33F/PIC24H
has a specific write/erase requirement that must be
adhered to for proper device operation. The rule is that
any given word in memory must not be written without
first erasing the page in which it is located. Thus, the
easiest way to conform to this rule is to write all the data
in a programming block within one write cycle. The pro-
gramming methods specified in this document comply
with this requirement.
Note:
A program memory word can be pro-
grammed twice before an erase, but only
if (a) the same data is used in both pro-
gram operations or (b) bits containing ‘1’
are set to ‘0’ but no ‘0’ is set to ‘1’.
DS70152D-page 2
Preliminary
©
2007 Microchip Technology Inc.
dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
2.3
Pin Diagrams
The pin diagrams for the dsPIC33F/PIC24H device
family are shown in the following figures. The pins that
are required for programming are listed in Table 2-1.
The MCLR, PGC1, PGD1, PGC2, PGD2, PGC3 and
PGD3 pins are shown in bold letters in the figures.
Refer to the appropriate device data sheet for complete
pin descriptions.
TABLE 2-1:
Pin Name
PIN DESCRIPTIONS (PINS USED DURING PROGRAMMING)
During Programming
Pin Name
Pin Type
P
P
P
P
I
I/O
I
I/O
I
I/O
Programming Enable
Power Supply
Ground
Regulated Power Supply for Core
Primary Programming Pin Pair: Serial Clock
Primary Programming Pin Pair: Serial Data
Secondary Programming Pin Pair: Serial Clock
Secondary Programming Pin Pair: Serial Data
Tertiary Programming Pin Pair: Serial Clock
Tertiary Programming Pin Pair: Serial Data
Pin Description
MCLR
V
DD
and AV
DD
(1)
V
SS
and AV
SS
(1)
V
DDCORE
PGC1
PGD1
PGC2
PGD2
PGC3
PGD3
MCLR
V
DD
V
SS
V
DDCORE
PGC1
PGD1
PGC2
PGD2
PGC3
PGD3
Legend:
I = Input, O = Output, P = Power
Note 1:
All power supply and ground pins must be connected, including analog supplies (AV
DD
) and ground
(AV
SS
).
©
2007 Microchip Technology Inc.
Preliminary
DS70152D-page 3
dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
Pin Diagrams
64-Pin TQFP
CSDO/RG13
CSDI/RG12
CSCK/RG14
RG0
RG1
RF1
RF0
V
DD
V
DDCORE
OC8/CN16/RD7
OC7/CN15/RD6
OC6/IC6/CN14/RD5
OC5/IC5/CN13/RD4
OC4/RD3
OC3/RD2
OC2/RD1
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
COFS/RG15
AN16/T2CK/T7CK/RC1
AN17/T3CK/T6CK/RC2
SCK2/CN8/RG6
SDI2/CN9/RG7
SDO2/CN10/RG8
MCLR
SS2/T5CK/CN11/RG9
V
SS
V
DD
AN5/IC8/CN7/RB5
AN4/IC7/CN6/RB4
AN3/CN5/RB3
AN2/SS1/LVDIN/CN4/RB2
PGC3/EMUC3/AN1/V
REF
-/CN3/RB1
PGD3/EMUD3/AN0/V
REF
+/CN2/RB0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
dsPIC33FJ64GP206
dsPIC33FJ128GP206
PGC2/EMUC2/SOSCO/T1CK/CN0/RC14
PGD2/EMUD2/SOSCI/T4CK/CN1/RC13
OC1/RD0
IC4/INT4/RD11
IC3/INT3/RD10
IC2/U1CTS/INT2/RD9
IC1/INT1/RD8
V
SS
OSC2/CLKO/RC15
OSC1/CLKIN/RC12
V
DD
SCL1/RG2
SDA1/RG3
U1RTS/SCK1/INT0/RF6
U1RX/SDI1/RF2
U1TX/SDO1/RF3
PGC1/EMUC1/AN6/OCFA/RB6
PGD1/EMUD1/AN7/RB7
AV
DD
AV
SS
U2CTS/AN8/RB8
AN9/RB9
TMS/AN10/RB10
TDO/AN11/RB11
V
SS
V
DD
TCK/AN12/RB12
TDI/AN13/RB13
U2RTS/AN14/RB14
AN15/OCFB/CN12/RB15
U2RX/CN17/RF4
U2TX/CN18/RF5
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
DS70152D-page 4
Preliminary
©
2007 Microchip Technology Inc.
dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
Pin Diagrams (Continued)
64-Pin TQFP
CSDO/RG13
CSDI/RG12
CSCK/RG14
RG0
RG1
RF1
RF0
V
DD
V
DDCORE
OC8/CN16/RD7
OC7/CN15/RD6
OC6/IC6/CN14/RD5
OC5/IC5/CN13/RD4
OC4/RD3
OC3/RD2
OC2/RD1
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
COFS/RG15
AN16/T2CK/T7CK/RC1
AN17/T3CK/T6CK/RC2
SCK2/CN8/RG6
SDI2/CN9/RG7
SDO2/CN10/RG8
MCLR
SS2/T5CK/CN11/RG9
V
SS
V
DD
AN5/IC8/CN7/RB5
AN4/IC7/CN6/RB4
AN3/CN5/RB3
AN2/SS1/LVDIN/CN4/RB2
PGC3/EMUC3/AN1/V
REF
-/CN3/RB1
PGD3/EMUD3/AN0/V
REF
+/CN2/RB0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
dsPIC33FJ64GP306
dsPIC33FJ128GP306
PGC2/EMUC2/SOSCO/T1CK/CN0/RC14
PGD2/EMUD2/SOSCI/T4CK/CN1/RC13
OC1/RD0
IC4/INT4/RD11
IC3/INT3/RD10
IC2/U1CTS/INT2/RD9
IC1/INT1/RD8
V
SS
OSC2/CLKO/RC15
OSC1/CLKIN/RC12
V
DD
SCL1/RG2
SDA1/RG3
U1RTS/SCK1/INT0/RF6
U1RX/SDI1/RF2
U1TX/SDO1/RF3
©
2007 Microchip Technology Inc.
PGC1/EMUC1/AN6/OCFA/RB6
PGD1/EMUD1/AN7/RB7
AV
DD
AV
SS
U2CTS/AN8/RB8
AN9/RB9
TMS/AN10/RB10
TDO/AN11/RB11
V
SS
V
DD
TCK/AN12/RB12
TDI/AN13/RB13
U2RTS/AN14/RB14
AN15/OCFB/CN12/RB15
U2RX/SDA2/CN17/RF4
U2TX/SCL2/CN18/RF5
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Preliminary
DS70152D-page 5
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