Design Idea DI-51
DPA-Switch
™
5 W Flyback DC-DC Converter
Application
DC-DC Converter
Device
DPA423R
Power Output
5W
Input Voltage
36-75 VDC
Output Voltage
5V
®
Topology
Flyback
Design Highlights
•
•
•
•
•
•
•
Small footprint: 35 mm x 20 mm (1.4 in. x 0.8 in.)
High efficiency flyback (>80% min.)
8.8 W per cu. in.
Low component count
Accurate line OV and UV protection
Thermal, short circuit and output overload protection
No current sense components
Resistor R3 programs the internal current limit of the
DPA423R to 53% of nominal. This limits the overload power
that can be delivered in a fault condition.
Zener VR1 clamps the leakage inductance spikes to keep the
DRAIN voltage at a safe level. The bias supply for U1 is
provided from the auxiliary flyback transformer winding
(pins 2 and 4), rectified and filtered by diode D1 and
capacitor C23.
A snubber for diode D2 (capacitor and resistor) can be used,
but was not needed in this application. Inductor L2 and
capacitor C12 form a post filter to reduce high frequency
output switching ripple. A soft-finish network, C18, D3 and
R7, eliminates output turn-on overshoot. The remaining
components provide output voltage regulation and loop
compensation.
Operation
DPA-Switch
greatly simplifies the design compared to a discrete
implementation. Resistor R1 sets the input under/over voltages
to 33 V and 86 V, respectively. Including tolerances, these
thresholds guarantee the converter is operational between 36 V
and 75 V without the cost of additional line sense components.
C7 1 nF
1.5 kV
+
VIN
36-75 VDC
L1
10
µH
0.85 A
1
R14
10
Ω
T1
7,8
D2 SL23
1A/30 V
C10
C11
100
µF
100
µF
10 V 10 V
L2
300 nH
6A
C12
100
µF
10 V
5 V, 1 A
FL
5,6
RTN
D1 BAV19WS
2
4
3
C23
4.7
µF
20 V
U2
R7 U2
10 kΩ
R10
18 kΩ
1%
R1
619 kΩ
1%
C1
0.22
µF
100 V
C2
1
µF
100 V
DPA-Switch
U1
DPA423R
D
L
CONTROL
D3
BAV19WS
R6
150
Ω
C16
220 nF
R12
5.1
Ω
C17
1
µF
R9
220
Ω
C
S
X
F
VR1
SMBJ
150 A
-VIN
R3
14.4 kΩ C5
1% 47 nF
R4
1.0
Ω
C6
68
µF
10 V
C18
10
µF
10 V
U3
LM431AIM3
R11
18 kΩ
1%
PI-3547-062403
Figure 1. DPA-Switch Flyback DC-DC Converter.
.
DI-51
www.powerint.com
July 2003
DI-51
Key Design Points
• For the nominal under-voltage set point V
UV
:
R1 = (V
UV
– 2.35) / 50
µA
V
OV
= (R1
x
135
µA)
+ 2.5 V
• For highest efficiency designs: use continuous conduction
mode operation designed at approximately 0.4 K
RP
;
minimize turns in the transformer while keeping AC flux
density (BM) < 3000 Gauss; fully fill a single layer for each
winding to minimize leakage inductance and maximize
copper fill factor; use a Schottky rectifying diode (D2) with
a low forward drop (in this case, the SL23 diode has a
V
f
= 0.320 V at 125
°C/2A).
• Resistor R3: the PIXls spreadsheet calculates the peak
current (IP) of the power supply. Resistor R3 is chosen to
set the internal current limit 10% to 15% above the calculated
IP value. This limits overload power (worst case is at high
input line).
• Set resonant frequency of post-filter (L2, C12) beyond
crossover frequency (typically 5% to 10% of switching
frequency).
• For main secondary current loop from transformer pin 8 to
diode D2 and capacitors C10, C11 and back to pin 6 of the
transformer: ensure identical path length for C10 and C11
to guarantee they equally share the ripple current.
• Due to the very tight size constraints on this power supply,
the drain voltage traces should be kept as short as possible
and where possible, shielded by surrounding them with
source potential traces. This will prevent noise coupling to
the low-voltage signal pins of the
DPA-Switch.
TRANSFORMER PARAMETERS
Core Material
EFD-10
Ferroxcube 3F3
A
L
of 100 nH/T
2
EDF-10 8 pin
(or equivalent)
1/2 Primary (1-FL), Tape, Bias
(4-3), 5 V (5-8),
Tape, 1/2 Primary (FL-2), Tape
174
µH ±
10%
4.7 MHz (minimum)
1.0
µH
(minimum)
Bobbin
Winding Order
(pin numbers)
Primary Inductance
Primary Resonant
Frequency
Leakage Inductance
Table 1. Transformer Construction Information.
85
84
83
Efficiency (%)
82
81
80
79
78
77
76
75
1
2
3
4
5
36 VDC
48 VDC
72 VDC
Pout (W)
Figure 2. Efficiency vs. Output Power.
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Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability.
Power Integrations does not assume any liability arising from the use of any device or circuit described herein, nor does it convey any license
under its patent rights or the rights of others. The products and applications illustrated herein (including circuits external to the products and
transformer construction) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent
applications assigned to Power Integrations. A complete list of Power Integrations’ patents may be found at www.powerint.com.
The PI Logo,
TOPSwitch
,
TinySwitch
,
LinkSwitch
and
EcoSmart
are registered trademarks of Power Integrations, Inc.
PI Expert
and
DPA-Switch
are trademarks of Power Integrations, Inc. ©Copyright 2003, Power Integrations, Inc.
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A
7/03
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PI-3548-060403
Microcontroller MCU
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