NCP348, NCP348AE
Positive Overvoltage
Protection Controller with
Internal Low R
ON
NMOS FET
and Status FLAG
The NCP348 is able to disconnect the systems from its output pin
in case wrong input operating conditions are detected. The system is
positive overvoltage protected up to +28 V.
Due to this device using internal NMOS, no external device is
necessary, reducing the system cost and the PCB area of the
application board.
The NCP348 is able to instantaneously disconnect the output from
the input, due to integrated Low R
ON
Power NMOS (65 mW), if the
input voltage exceeds the overvoltage threshold (OVLO) or
undervoltage threshold (UVLO).
At powerup (EN pin = low level), the V
out
turns on 50 ms after the
V
in
exceeds the undervoltage threshold.
The NCP348 provides a negative going flag (FLAG) output, which
alerts the system that a fault has occurred.
In addition, the device has ESD−protected input (15 kV Air) when
bypassed with a 1.0
mF
or larger capacitor.
Features
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MARKING
DIAGRAM
WDFN10
MT SUFFIX
CASE 516AA
BAI
BAJ
M
G
BAxM
G
= NCP348
= NCP348AE
= Date Code
= Pb−Free Package
PIN CONNECTIONS
IN
GND
FLAG
IN
IN
1
2
3
4
5
PAD2
IN
(Top View)
PAD1
GND
10 EN
9
8
7
6
NC
NC
OUT
OUT
•
•
•
•
•
•
•
•
•
Overvoltage Protection up to 28 V
On−Chip Low R
DS(on)
NMOS Transistor: 65 mW
Internal Charge Pump
Overvoltage Lockout (OVLO)
Undervoltage Lockout (UVLO)
Internal 50 ms Startup Delay
Alert
FLAG
Output
Shutdown
EN
Input
Compliance to IEC61000−4−2 (Level 4)
8.0 kV (Contact)
15 kV (Air)
•
ESD Ratings: Machine Model = B
Human Body Model = 3
•
10 Lead WDFN 2.5x2 mm Package
•
This is a Pb−Free Device
Applications
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
•
•
•
•
•
Cell Phones
Camera Phones
Digital Still Cameras
Personal Digital Applications
MP3 Players
Q
©
Semiconductor Components Industries, LLC, 2010
May, 2010
−
Rev. 6
1
Publication Order Number:
NCP348/D
NCP348, NCP348AE
V
Bat
V
Bat
D3
7011X/SM
NCP1835B
3
EN
CFLG
2
FAULT V2P8
VSNS
1
V
CC
BAT
TIMER
4.7
mF
V
Bat
1M
ISEL
8 4
270 K
GND
5
6
7
9
10
ENABLE / Microprocessor
V2P8
V
Bat
100 nF
Lithium BATTERY
Wall Adapter
−
AC/DC
1
mF
NCP348
1
IN
OUT
4
IN
OUT
5 IN
NC
10
NC
EN
FLAG
ENABLE /
2
Microprocessor
GND
0
6
7
8
9
3
15 pF
0
Figure 1. Typical Application Circuit
INPUT
OUTPUT
60 mA
Output Impedance = 200 k
Charge
Pump
Gate
Driver
ESD
Protection
Core
Negative
Protection
FLAG
Delay
Generator
200 kHz
Power
ON
EN
Block
UVLO
V
REF
V
REF
UVLO
OVLO
V
REF
OVLO
DISABLE
ESD
Protection
10 V
EN
LDO
Oscillator
V
REG
V
REG
ESD
Protection
Figure 2. Functional Block Diagram
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2
NCP348, NCP348AE
PIN FUNCTION DESCRIPTION
Pin No.
1
4
5
Symbol
IN
Function
POWER
Description
Input Voltage Pin.
This pin is connected to the power supply.
The device system core is supplied by this input.
A 1
mF
low ESR ceramic capacitor, or larger, must be connected between this pin and GND.
The three IN pins must be hardwired to common supply.
Ground
Fault Indication Pin.
This pin allows an external system to detect a fault on IN pin.
The FLAG pin goes low when input voltage exceeds OVLO threshold or drop below UVLO threshold.
Since the FLAG pin is open drain functionality, an external pull up resistor to V
CC
must be added.
Output Voltage Pin.
This pin follows IN pin when “no fault” is detected.
The output is disconnected from the V
in
power supply when the input voltage is under the UVLO
threshold or above OVLO threshold.
The two OUT pins must be hardwired to common supply.
No Connect
No Connect
Enable Pin.
The device enters in shutdown mode when this pin is tied to a high level. In this case the output is
disconnected from the input.
To allow normal functionality, the EN pin shall be connected to GND to a pull down or to a I/O pin.
This pin does not have an impact on the fault detection.
PAD1, under the device. See PCB recommendations page 10.
Can be shorted to GND.
The PAD2 is electrically connected to the internal NMOS drain and connected to Pins 4 and 5.
See PCB recommendations page 10.
2
3
GND
FLAG
POWER
OUTPUT
6
7
OUT
OUTPUT
8
9
10
NC
NC
EN
OPEN
OPEN
INPUT
PAD1
PAD2
MAXIMUM RATINGS
Rating
Minimum Voltage (IN to GND)
Minimum Voltage (All others to GND)
Maximum Voltage (IN to GND)
Maximum Voltage (All others to GND)
Maximum Current (UVLO<V
IN
<OVLO)
Thermal Resistance, Junction−to−Air (Note 1)
Operating Ambient Temperature Range
Storage Temperature Range
Junction Operating Temperature
ESD Withstand Voltage (IEC 61000−4−2) (input only) when bypassed with 1.0
mF
capacitor
Human Body Model (HBM), Model = 2 (Note 2)
Machine Model (MM) Model = B (Note 3)
Moisture Sensitivity
Symbol
Vmin
in
Vmin
Vmax
in
Vmax
Imax
R
qJA
T
A
T
stg
T
J
Vesd
Value
−0.3
−0.3
30
7.0
2.0
280
−40
to +85
−65
to +150
150
15 Air, 8.0 Contact
2000
200
Level 1
Unit
V
V
V
V
A
°C/W
°C
°C
°C
kV
V
V
−
MSL
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The R
qJA
is highly dependent on the PCB heat sink area (connected to pad 2). As example R
qJA
is 268
°C/W
with 30 mm
2
(copper 35
mm)
and
189
°C/W
with 400 mm
2
.
2. Human Body Model, 100 pF discharged through a 1.5 kW resistor following specification JESD22/A114.
3. Machine Model, 200 pF discharged through all pins following specification JESD22/A115.
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3
NCP348, NCP348AE
ELECTRICAL CHARACTERISTICS
(Min/Max limits values (−40°C < T
A
< +85°C) and V
in
= +5.0 V. Typical values are T
A
= +25°C,
unless otherwise noted.)
Input Voltage Range
Undervoltage Lockout Threshold (Note 4)
Undervoltage Lockout Hysteresis
Overvoltage Lockout Threshold (Note 4)
NCP348MTT
NCP348AEMTT
Overvoltage Lockout Hysteresis
NCP348MTT
NCP348AEMTT
V
in
versus V
out
Resistance
Supply Quiescent Current
Characteristic
Symbol
V
in
UVLO
UVLO
hyst
OVLO
Conditions
−
−
−
V
in
rises up OVLO threshold
Min
1.2
3.0
20
6.0
5.7
50
30
V
in
= 5.0 V, EN = GND,
Load connected to V
out
No load. EN = 5.0 V
No load. EN = Gnd
UVLO Supply Current
FLAG
Output Low Voltage
Idd
uvlo
Vol
flag
V
IN
= 2.9 V
1.2 V < V
IN
< UVLO
Sink 50
mA
on/FLAG pin
V
IN
> OVLO
Sink 1.0 mA on FLAG pin
FLAG
Leakage Current
EN
Voltage High
EN
Voltage Low
EN
Leakage Current
TIMINGS
Startup Delay
ton
From V
in
: (0 to (OVLO
−
300 mV)
< V
in
< OVLO) to V
out
= 0.3 V
Rise time<4ms (See Figures 3 & 7)
From V
out
= 0.3 V to FLAG = 1.2 V
(See Figures 3 & 9)
From V
in
> OVLO to V
out
< = 0.3 V
(See Figures 4 & 8)
V
in
increasing from 5.0 V to 8.0 V at
3.0 V/ms, Rload connected on V
out
From V
in
> OVLO to FLAG < = 0.4 V
(See Figures 4 & 10)
V
in
increasing from 5.0 V to 8.0 V at
3.0 V/ms, Rload connected on V
out
From EN > = 1.2 V to V
out
< 0.3 V
Rload = 5.0
W
(See Figures 5 & 12)
30
55
70
ms
FLAG
leak
Vih
Vol
EN
leak
FLAG level = 5.0 V
−
−
EN = 5.0 V or GND
−
−
−
−
−
−
−
1.2
−
−
Typ
−
3.25
50
6.4
6.02
100
60
65
90
170
70
20
−
1.0
−
−
1.0
Max
28
3.5
100
6.8
6.4
mV
150
90
120
150
250
100
400
400
−
−
0.4
−
mW
mA
mA
mA
mV
mV
nA
V
V
nA
Unit
V
V
mV
V
OVLO
hyst
−
R
DS(on)
Idd
FLAG
Going Up Delay
Output Turn Off Time
tstart
toff
30
−
50
1.5
70
5.0
ms
ms
Alert Delay
tstop
−
1.0
−
ms
Disable Time
tdis
−
1.0
5.0
ms
NOTE: Electrical parameters are guaranteed by correlation across the full range of temperature.
4. Additional UVLO and OVLO thresholds ranging from UVLO and from OVLO can be manufactured. Contact your ON Semiconductor
representative for availability.
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4
NCP348, NCP348AE
TIMING DIAGRAMS
<OVLO
V
in
V
in
−
(R
DS(on)
t
start
FLAG
FLAG
1.2 V
t
stop
0.4 V
I)
V
out
V
in
−
(R
DS(on)
I)
OVLO
t
off
0.3 V
V
in
UVLO
t
on
V
out
0.3 V
Figure 3. Startup
Figure 4. Shutdown on Overvoltage Detection
EN
EN
V
out
V
in
−
(R
DS(on)
FLAG
1.2 V
t
dis
I)
0.3 V
FLAG
V
in
1.2 V
OVLO
UVLO
100 ms
Figure 5. Disable on EN = 1
Figure 6. FLAG Response with EN = 1
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