Burr Brown Products
from Texas Instruments
DA
C8
822
DAC8822
SBAS390A – DECEMBER 2006 – REVISED MARCH 2007
16-Bit, Dual, Parallel Input, Multiplying
Digital-to-Analog Converter
FEATURES
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±0.5LSB
DNL
±1LSB
INL
Low Noise: 12nV/√Hz
Low Power Operation:
I
DD
= 1µA per Channel at 2.7V
2mA Full-Scale Current, with V
REF
= 10V
Settling Time: 0.5µs
16-Bit Monotonic
4-Quadrant Multiplying Reference Inputs
Reference Bandwidth: 10MHz
Reference Input:
±18V
Reference Dynamics: –105 THD
Midscale or Zero Scale Reset
Analog Power Supply: +2.7V to +5.5V
TSSOP-38 Package
Industry-Standard Pin Configuration
Pin-Compatible with the 14-Bit
DAC8805
Temperature Range: –40°C to +125°C
DESCRIPTION
The DAC8822 dual, multiplying digital-to-analog
converter (DAC) is designed to operate from a single
2.7V to 5.5V supply.
The applied external reference input voltage V
REF
determines the full-scale output current. An internal
feedback resistor (R
FB
) provides temperature
tracking for the full-scale output when combined with
an external, current-to-voltage (I/V) precision
amplifier.
A RSTSEL pin allows system reset assertion (RS) to
force all registers to zero code when RSTSEL = '0',
or to midscale code when RSTSEL = '1'. Additionally,
an internal power-on reset forces all registers to zero
or midscale code at power-up, depending on the
state of the RSTSEL pin.
A
parallel
interface
offers
high-speed
communications. The DAC8822 is packaged in a
space-saving TSSOP-38 package and has an
industry-standard pinout. The device is specified
from –40°C to +125°C.
For a 14-bit, pin-compatible version, see the
DAC8805.
APPLICATIONS
Automatic Test Equipment
Instrumentation
Digitally Controlled Calibration
Industrial Control PLCs
DGND
D0
D15
WR
A0
A1
Input B
Register
Control
Logic
Parallel
Bus
Interface
Input A
Register
V
DD
R
1
A
R
COM
A
R
1
A
V
REF
A R
OFS
A
R
OFS
A
R
FB
A
R
FB
A
R
2
A
DAC A
Register
DAC A
I
OUT
A
AGNDA
DAC B
Register
DAC B
I
OUT
B
AGNDB
RS
LDAC
RSTSEL
Power-On
Reset
R
1
B
R
1
B
R
2
B
R
OFS
B
R
FB
B
R
COM
B
V
REF
B R
OFS
B
R
FB
B
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2007, Texas Instruments Incorporated
DAC8822
www.ti.com
SBAS390A – DECEMBER 2006 – REVISED MARCH 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
ORDERING INFORMATION
(1)
PRODUCT
DAC8822QB
DAC8822QC
RELATIVE
ACCURACY
(LSB)
±2
±1
DIFFERENTIAL
NONLINEARITY
(LSB)
±1
±1
PACKAGE-LEAD
(DESIGNATOR)
TSSOP-38
(DBT)
TSSOP-38
(DBT)
SPECIFIED
TEMPERATURE
RANGE
–40°C to +125°C
–40°C to +125°C
PACKAGE
MARKING
DAC8822
DAC8822
(1)
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at
www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
DAC8822
V
DD
to GND
Digital input voltage to GND
V (I
OUT
) to GND
REF, R
OFS
, R
FB
, R
1
, R
COM
to AGND, DGND
Operating temperature range
Storage temperature range
Junction temperature range (T
J
max)
Power dissipation
Thermal impedance, R
θJA
ESD rating
(1)
Human Body Model (HBM)
Charged Device Model (CDM)
–0.3 to +7
–0.3 to +V
DD
+ 0.3
–0.3 to +V
DD
+ 0.3
±25
–40 to +125
–65 to +150
+150
(T
J
max – T
A
) / R
θJA
53
4000
500
UNIT
V
V
V
V
°C
°C
°C
W
°C/W
V
V
Stresses above those listed under
Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to absolute
maximum conditions for extended periods may affect device reliability.
2
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SBAS390A – DECEMBER 2006 – REVISED MARCH 2007
ELECTRICAL CHARACTERISTICS
All specifications at T
A
= –40°C to +125°C, V
DD
= +2.7V to +5.5V, I
OUT
= virtual GND, GND = 0V, and V
REF
= 10V, unless otherwise noted.
DAC8822
PARAMETER
STATIC PERFORMANCE
Resolution
Relative accuracy
Differential nonlinearity
Output leakage current
Output leakage current
Full-scale gain error
Full-scale temperature coefficient
Bipolar zero error
Power-supply rejection ratio
OUTPUT
CHARACTERISTICS
(1)
2
Code dependent
50
mA
pF
T
A
= +25°C
Full temperature range
PSRR V
DD
= 5V
±10%
INL
DNL
Data = 0000h, T
A
= +25°C
Data = 0000h, Full temperature range
Unipolar, data = FFFFh
Bipolar, data = FFFFh
±1
±1
±1
±1
±1
±0.2
DAC8822QB
DAC8822QC
±0.5
16
±2
±1
±1
10
20
±4
±4
±2
±3
±3
±1.0
Bits
LSB
LSB
LSB
nA
nA
mV
mV
ppm/°C
mV
mV
LSB/V
CONDITIONS
MIN
TYP
MAX
UNITS
Output current
Output capacitance
REFERENCE INPUT
Reference voltage range
Input resistance (unipolar)
Input capacitance
R
1
, R
2
Feedback and offset resistance
LOGIC INPUTS AND
Input low voltage
OUTPUT
(1)
V
IL
V
DD
= +2.7V
V
IL
V
DD
= +5V
V
IH
V
DD
= +2.7V
V
IH
V
DD
= +5V
I
IL
C
IL
V
DD
Normal operation, logic inputs = 0V
Supply current
CHARACTERISTICS
(1) (2)
t
S
To 0.0015% of full-scale,
data = 0000h to FFFFh to 0000h
I
DD
V
DD
= +4.5V to +5.5V, V
IH
= V
DD
and V
IL
= GND
V
DD
= +2.7V to +3.6V, V
IH
= V
DD
and V
IL
= GND
AC
2.7
2.1
2.4
R
OFS
, R
FB
4
8
V
REF
R
REF
–18
4
18
5
5
5
10
6
12
6
V
kΩ
pF
kΩ
kΩ
0.6
0.8
V
V
V
V
µA
pF
Input high voltage
Input leakage current
Input capacitance
POWER REQUIREMENTS
Supply voltage
0.001
1
8
5.5
3
3
1
6
6
3
V
µA
µA
µA
Output current settling time
Reference multiplying BW
DAC glitch impulse
Feedthrough error
Crosstalk error
Digital feedthrough
Total harmonic distortion
Output noise density
0.5
10
5
–70
–100
1
–105
12
µs
MHz
nV–s
dB
dB
nV–s
dB
nV/√Hz
BW – 3dB V
REF
= 5V
PP
, data = FFFFh, 2-quadrant mode
V
REF
= 0V to 10V,
data = 7FFFh to 8000h to 7FFFh
V
OUT
/V
REF
Data = 0000h, V
REF
= 100kHz,
±10V
PP
,
2-quadrant mode
V
OUT
A/V
REF
B Data = 0000h, V
REF
B = 100mV
RMS
, f = 100kHz
LDAC = logic low, V
REF
= –10V to + 10V
Any code change
THD V
REF
= 6V
RMS
, data = FFFFh, f = 1kHz
e
N
f = 1kHz, BW = 1Hz, 2-quadrant mode
(1)
(2)
Specified by design and characterization; not production tested.
All ac characteristic tests are performed in a closed-loop system using a
THS4011 I-to-V converter amplifier.
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DAC8822
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SBAS390A – DECEMBER 2006 – REVISED MARCH 2007
PIN ASSIGNMENTS
DBT PACKAGE
TSSOP-38
(TOP VIEW)
D1
D0
R
OFS
A
R
FB
A
R
1
A
R
COM
A
V
REF
A
I
OUT
A
AGNDA
DGND
AGNDB
I
OUT
B
V
REF
B
R
COM
B
R
1
B
R
FB
B
R
OFS
B
WR
A0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
DAC8822
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
D2
D3
D4
D5
D6
D7
D8
D9
D10
VDD
D11
D12
D13
D14
D15
RS
RSTSEL
LDAC
A1
4
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SBAS390A – DECEMBER 2006 – REVISED MARCH 2007
PIN ASSIGNMENTS (continued)
Table 1. TERMINAL FUNCTIONS
PIN #
1, 2, 24-28,
30-38
3
4
5
NAME
D0-D15
R
OFS
A
R
FB
A
R
1
A
DESCRIPTION
Digital Input Data Bits D0 to D15. Signal level must be
≤
V
DD
+0.3V. D15 is MSB.
Bipolar Offset Resistor A. Accepts up to
±18V.
In 2-quadrant mode, R
OFS
A ties to R
FB
A.
In 4-quadrant mode, R
OFS
A ties to R
1
A and the external reference.
Internal Matching Feedback Resistor A. Connects to the external op amp for I-V conversion.
4-Quadrant Resistor.
In 2-quadrant mode, R
1
A shorts to the V
REF
A pin.
In 4-quadrant mode, R
1
A ties to R
OFS
A and the reference input.
Center Tap Point of the Two 4-Quadrant Resistors, R
1
A and R
2
A.
In 2-quadrant mode, R
COM
A shorts to the V
REF
pin.
In 4-quadrant mode, R
COM
A ties to the inverting node of the reference amplifier.
DAC A Reference Input in 2-Quadrant Mode, R
2
Terminal in 4-Quadrant Mode.
In 2-quadrant mode, V
REF
A is the reference input with constant input resistance versus code.
In 4-quadrant mode, V
REF
A is driven by the external reference amplifier.
DAC A Current Output. Connects to the inverting terminal of external precision I-V op amp for voltage
output.
DAC A Analog Ground.
Digital Ground.
DAC B Analog Ground.
DAC B Current Output. Connects to the inverting terminal of external precision I-V op amp for voltage
output.
DAC B Reference Input in 2-Quadrant Mode, R
2
Terminal in 4-Quadrant Mode.
In 2-quadrant mode, V
REF
B is the reference input with constant input resistance versus code.
In 4-quadrant mode, V
REF
B is driven by the external reference amplifier.
Center Tap Point of the Two 4-Quadrant Resistors, R
1
B and R
2
B.
In 2-quadrant mode, R
COM
B shorts to the V
REF
pin.
In 4-quadrant mode, R
COM
B ties to the inverting node of the reference amplifier.
4-Quadrant Resistor.
In 2-quadrant mode, R
1
B shorts to the V
REF
B pin.
In 4-quadrant mode, R
1
B ties to R
OFS
B and the reference input.
Internal Matching Feedback Resistor B. Connects to external op amp for I-V conversion.
Bipolar Offset Resistor B. Accepts up to
±18V.
In 2-quadrant mode, R
OFS
B ties to R
FB
B.
In 4-quadrant mode, R
OFS
B ties to R
1
B and the external reference.
Write Control Digital Input In, Active Low. WR enables input registers.
Signal level must be
≤
V
DD
+ 0.3V.
Address 0. Signal level must be
≤
V
DD
+ 0.3V.
Address 1. Signal level must be
≤
V
DD
+ 0.3V.
Digital Input Load DAC Control. Signal level must be
≤
V
DD
+ 0.3V. See the
Function of Control Inputs
table for details.
Power-On Reset State.
RSTSEL = 0 corresponds to zero-scale reset.
RSTSEL = 1 corresponds to midscale reset.
The signal level must be
≤
V
DD
+ 0.3V.
Reset. Active low resets both input and DAC registers.
Resets to zero-scale if RSTSEL= 0, and to midscale if RSTSEL = 1.
Signal level must be equal to or less than VDD + 0.3 V.
Positive Power Supply Input. The specified range of operation is 2.7V to 5.5V.
6
R
COM
A
7
8
9
10
11
12
13
V
REF
A
I
OUT
A
AGNDA
DGND
AGNDB
I
OUT
B
V
REF
B
14
R
COM
B
15
16
17
18
19
20
21
R
1
B
R
FB
B
R
OFS
B
WR
A0
A1
LDAC
22
RSTSEL
23
29
RS
V
DD
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