Latch-Up Current ..................................................... >200 mA
Operating Range
Range
Commercial
Ambient
Temperature
0
°
C to +70
°
C
V
CC
5V
±
10%
Electrical Characteristics
Over the Operating Range
-15
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
I
SB1
I
SB2
Description
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
[1]
Input Leakage Current
Output Leakage
Current
V
CC
Operating
Supply Current
Automatic CE Power-
Down Current
[3]
Automatic CE
Power-Down Current
GND
<
V
I
<
V
CC
GND
<
V
O
<
V
CC
,
Output Disabled
V
CC
= Max.,
I
OUT
= 0 mA
Max. V
CC
, CE
≥
V
IH
Max. V
CC
, CE
≥
V
CC
– 0.3V,
V
IN
≥
V
CC
– 0.3V
or V
IN
≤
0.3V
Test Conditions
V
CC
= Min., I
OH
= –4.0mA
V
CC
= Min., I
OL
=12.0 mA
2.2
–0.5
–5
–5
Min.
2.4
0.4
V
CC
0.8
+5
+5
90
40
20
2.2
–0.5
–5
–5
Max.
-25 and -35
Min.
2.4
0.4
V
CC
0.8
+5
+5
70
20
20
Max.
Unit
V
V
V
V
µA
µA
mA
mA
mA
Capacitance
[4]
Parameter
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
T
A
= 25°C, f = 1 MHz,
V
CC
= 5.0V
Max.
10
10
Unit
pF
pF
AC Test Loads and Waveforms
R1 329
Ω
5V
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
R2 202
Ω
5V
OUTPUT
5 pF
INCLUDING
JIG AND
SCOPE
R2 202
Ω
R1 329
Ω
ALL INPUT PULSES
3.0V
GND
10%
90%
90%
10%
≤
5 ns
C187–5
≤
5 ns
(a)
(b)
C187–4
Equivalent to:
THÉ VENIN EQUIVALENT
125Ω
OUTPUT
1.90V
Notes:
1. V
IL
(min.) = –3.0V for pulse durations less than 30 ns.
2. Not more than 1 output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
3. A pull-up resistor to V
CC
on the CE input is required to keep the device deselected during V
CC
power-up, otherwise I
SB
will exceed values given.
4. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-05044 Rev. *A
Page 2 of 9
CY7C187
Switching Characteristics
Over the Operating Range
[5]
-15
Parameter
READ CYCLE
t
RC
t
AA
t
OHA
t
ACE
t
LZCE
t
HZCE
t
PU
t
PD
t
WC
t
SCE
t
AW
t
HA
t
SA
t
PWE
t
SD
t
HD
t
LZWE
t
HZWE
Read Cycle Time
Address to Data Valid
Output Hold from Address Change
CE LOW to Data Valid
CE LOW to Low Z
[6]
CE HIGH to High Z
[6, 7]
CE LOW to Power Up
CE HIGH to Power Down
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
[7]
15
12
12
0
0
12
10
0
5
7
0
15
20
20
20
0
0
15
10
0
5
7
3
8
0
20
25
25
25
0
0
20
15
0
5
10
3
15
5
10
0
20
15
15
5
25
5
15
25
25
5
35
35
35
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Description
Min.
Max.
Min.
-25
Max.
Min.
-35
Max.
Unit
WRITE CYCLE
[8]
Switching Waveforms
Read Cycle No. 1
[9, 10]
t
RC
ADDRESS
t
OHA
DATA OUT
PREVIOUS DATA VALID
t
AA
DATA VALID
C187–6
Notes:
5. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
OL
/I
OH
and 30-pF load capacitance.
6. At any given temperature and voltage condition, t
HZCE
is less than t
LZCE
for any given device.
7. t
HZCE
and t
HZWE
are specified with C
L
= 5 pF as in part (b) of AC Test Loads. Transition is measured
±500
mV from steady-state voltage.
8. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can
terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
9. WE is HIGH for read cycle.
10. Device is continuously selected, CE = V
IL
.
Document #: 38-05044 Rev. *A
Page 3 of 9
CY7C187
Switching Waveforms
Read Cycle No. 2
[9, 11]
t
RC
CE
t
ACE
t
LZCE
DATA OUT
HIGH IMPEDANCE
DATA VALID
t
PD
ICC
50%
50%
ISB
C187–7
t
HZCE
HIGH
IMPEDANCE
V
CC
SUPPLY
CURRENT
t
PU
Write Cycle No. 1(WE Controlled)
[11]
t
WC
ADDRESS
t
SCE
CE
t
SA
WE
t
SD
DATA IN
DATA VALID
t
HZWE
DATA OUT
DATA UNDEFINED
C187–8
t
AW
t
PWE
t
HA
t
HD
t
LZWE
HIGH IMPEDANCE
Note:
11. Address valid prior to or coincident with CE transition LOW.
Document #: 38-05044 Rev. *A
Page 4 of 9
CY7C187
Switching Waveforms
Write Cycle No. 2(CE Controlled)
[11,13]
t
WC
ADDRESS
t
SA
CE
t
AW
t
PWE
WE
t
SD
DATA IN
DATA VALID
t
HD
t
HA
t
SCE
DATA OUT
HIGH IMPEDANCE
C187–9
Typical DC and AC Characteristics
OUTPUT SOURCE CURRENT (mA)
NORMALIZED SUPPLY CURRENT
vs. SUPPLY VOLTAGE
1.4
NORMALIZED I
CC,
I
SB
1.2
1.0
0.8
0.6
0.4
0.2
0.0
4.0
4.5
5.0
I
SB
5.5
6.0
I
CC
NORMALIZED I
CC,
I
SB
1.2
1.0
0.8
0.6
0.4
0.2
0.0
–55
I
SB
25
125
V
CC
=5.0V
V
IN
=5.0V
I
CC
NORMALIZED SUPPLY CURRENT
vs. AMBIENT TEMPERATURE
OUTPUT SOURCE CURRENT
vs. OUTPUT VOLTAGE
120
100
80
60
40
20
0
0.0
1.0
2.0
3.0
4.0
V
CC
=5.0V
T
A
=25°C
SUPPLY VOLTAGE(V)
NORMALIZED ACCESS TIME
vs. SUPPLY VOLTAGE
1.4
NORMALIZED t
AA
NORMALIZED t
AA
1.3
1.2
1.1
T
A
=25°C
1.0
0.9
0.8
4.0
4.5
5.0
5.5
6.0
1.6
1.4
1.2
1.0
AMBIENT TEMPERATURE (°C)
NORMALIZED ACCESS TIME
vs. AMBIENT TEMPERATURE
OUTPUT VOLTAGE (V)
OUTPUT SINK CURRENT
vs. OUTPUT VOLTAGE
140
120
100
80
60
40
20
0
0.0
1.0
2.0
3.0
4.0
V
CC
=5.0V
T
A
=25°C
V
CC
=5.0V
0.8
0.6
–55
25
125
SUPPLY VOLTAGE (V)
AMBIENT TEMPERATURE (°C)
OUTPUT SINK CURRENT (mA)
OUTPUT VOLTAGE (V)
Note:
12. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
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