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PI6C2501AWE

Description
Phase-Locked Loop Clock Driver
Categorylogic    logic   
File Size45KB,4 Pages
ManufacturerPericom Semiconductor Corporation (Diodes Incorporated)
Websitehttps://www.diodes.com/
Environmental Compliance
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PI6C2501AWE Overview

Phase-Locked Loop Clock Driver

PI6C2501AWE Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerPericom Semiconductor Corporation (Diodes Incorporated)
Parts packaging codeSOIC
package instructionSOP, SOP8,.25
Contacts8
Reach Compliance Codecompli
ECCN codeEAR99
series6C
Input adjustmentSTANDARD
JESD-30 codeR-PDSO-G8
length4.9 mm
Logic integrated circuit typePLL BASED CLOCK DRIVER
Number of functions1
Number of inverted outputs
Number of terminals8
Actual output times1
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristicsSERIES-RESISTOR
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP8,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3.3 V
Certification statusNot Qualified
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9 mm
minfmax134 MHz
V
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
1
2109876543212109876543210987654321098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C2501A
Phase-Locked Loop Clock Driver
Product Features
High-Performance, Phase-Locked-Loop Clock Driver and zero-
delay buffer
Allows Clock Input to have Spread Spectrum modulation
for EMI reduction
Zero Input-to-Output delay
Low jitter: Cycle-to-Cycle jitter ±75ps max.
On-chip series damping resistor at clock output drivers
for low noise and EMI reduction
Operates at 3.3V V
CC
Wide range of Clock Frequencies 80 to 134 MHz
Package: Plastic 8-pin 150-mil SOIC (W)
Plastic 8-pin 150-mil SOIC (WE) Pb-free
Product Description
The PI6C2501A features a low-skew, low-jitter, phase-locked loop
(PLL) clock driver. By connecting the CLK_OUT output to the
feedback FB_IN input, the propagation delay from the CLK_IN
input to CLK_OUT output will be nearly zero.
Application
If a system designer needs more than 16 outputs with the features
just described, using two or more zero-delay buffers, such as the
PI6C2509Q, or PI6C2510Q, is likely to be impractical. The
device-to-device skew introduced can significantly reduce the
performance. Pericom recommends using a zero-delay buffer and
an eighteen output non-zero-delay buffer. As shown in Figure 1,
this combination produces a zero-delay buffer with all the signal
characteristics of the original zero-delay buffer, but with as many
outputs as the non-zero-delay buffer part. For example, when
combined with an eighteen output non-zero delay buffer, a system
designer can create a seventeen-output zero-delay buffer.
Logic Block Diagram
Product Pin Configuration
AGND
GND
CLK_OUT
VCC
1
2
3
4
8
7
6
5
CLK_IN
AVCC
GND
FB_IN
CLK_IN
PLL
FB_IN
AV
CC
CLK_OUT
8-Pin
W
Feedback
C
Reference
Clock
Signal
Zero Delay
Buffer
PI6C2501
CLK_OUT
18 Outputs
Non-PLL
Buffer
17
Figure 1. This Combination Provides Zero-Delay Between
the Reference Clock Signal and 17 Outputs
1
PS8499A
09/19/05

PI6C2501AWE Related Products

PI6C2501AWE PI6C2501A PI6C2501AW
Description Phase-Locked Loop Clock Driver Phase-Locked Loop Clock Driver Phase-Locked Loop Clock Driver
Is it Rohs certified? conform to - incompatible
Maker Pericom Semiconductor Corporation (Diodes Incorporated) - Pericom Semiconductor Corporation (Diodes Incorporated)
Parts packaging code SOIC - SOIC
package instruction SOP, SOP8,.25 - SOP, SOP8,.25
Contacts 8 - 8
Reach Compliance Code compli - compli
ECCN code EAR99 - EAR99
series 6C - 6C
Input adjustment STANDARD - STANDARD
JESD-30 code R-PDSO-G8 - R-PDSO-G8
length 4.9 mm - 4.9 mm
Logic integrated circuit type PLL BASED CLOCK DRIVER - PLL BASED CLOCK DRIVER
Number of functions 1 - 1
Number of terminals 8 - 8
Actual output times 1 - 1
Maximum operating temperature 70 °C - 70 °C
Output characteristics SERIES-RESISTOR - SERIES-RESISTOR
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY
encapsulated code SOP - SOP
Encapsulate equivalent code SOP8,.25 - SOP8,.25
Package shape RECTANGULAR - RECTANGULAR
Package form SMALL OUTLINE - SMALL OUTLINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED - NOT SPECIFIED
power supply 3.3 V - 3.3 V
Certification status Not Qualified - Not Qualified
Maximum seat height 1.75 mm - 1.75 mm
Maximum supply voltage (Vsup) 3.6 V - 3.6 V
Minimum supply voltage (Vsup) 3 V - 3 V
Nominal supply voltage (Vsup) 3.3 V - 3.3 V
surface mount YES - YES
technology CMOS - CMOS
Temperature level COMMERCIAL - COMMERCIAL
Terminal form GULL WING - GULL WING
Terminal pitch 1.27 mm - 1.27 mm
Terminal location DUAL - DUAL
Maximum time at peak reflow temperature NOT SPECIFIED - NOT SPECIFIED
width 3.9 mm - 3.9 mm
minfmax 134 MHz - 134 MHz
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