LT1161
Quad Protected High-Side
MOSFET Driver
FEATURES
■
■
■
■
■
■
■
■
■
■
DESCRIPTIO
8V to 48V Power Supply Range
Protected from – 15V to 60V Supply Transients
Fully Enhances N-Channel MOSFET Switches
Individual Short-Circuit Protection
Individual Automatic Restart Timers
Programmable Current Limit, Delay Time, and
Auto-Restart Period
Voltage-Limited Gate Drive
Defaults to OFF State with Open Input
Flowthrough Input to Output Pinout
Available in 20-Lead DIP or SOL Package
The LT1161 is a quad high-side gate driver allowing the
use of low cost N-channel power MOSFETs for high-side
switching applications. It has four independent switch
channels, each containing a completely self-contained
charge pump to fully enhance an N-channel MOSFET
switch with no external components.
Also included in each switch channel is a drain sense
comparator that is used to sense switch current. When a
preset current level is exceeded, the switch is turned off.
The switch remains off for a period of time set by an
external timing capacitor and then automatically attempts
to restart. If the fault is still present, this cycle repeats until
the fault is removed, thus protecting the MOSFET.
The LT1161 has been specifically designed for harsh
operating environments such as industrial, avionics, and
automotive applications where poor supply regulation
and/or transients may be present. The device will not
sustain damage from supply voltages of –15V to 60V.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
APPLICATIO S
■
■
■
■
■
Industrial Control
Avionics Systems
Automotive Switches
Stepper Motor and DC Motor Control
Electronic Circuit Breaker
TYPICAL APPLICATIO
24V
C
T
0.1µF
0.1µF
0.1µF
0.1µF
V
+
T1
T2
T3
T4
IN1
IN2
IN3
IN4
GND
GND
LT1161
V
+
+
DS1
G1
DS2
G2
DS3
G3
DS4
G4
R
S
0.01Ω
IRFZ34
50µF
50V
0.50
0.45
Switch Drop vs Load Current
TOTAL DROP (V)
0.01Ω
IRFZ34
0.01Ω
IRFZ34
0.01Ω
IRFZ34
LOAD
#1
0.40
0.35
0.30
0.25
0.20
0.15
LOAD
#2
INPUTS
LOAD
#3
0.10
0.05
0
0
1
3
2
LOAD CURRENT (A)
4
5
1161 TA01
LOAD
#4
1161 F01
Figure 1. Protected Quad High-Side Switch
1161fa
U
U
U
1
LT1161
ABSOLUTE
MAXIMUM
RATINGS
Supply Voltages (Pins 11, 20) ................... – 15V to 60V
Input Voltages (Pins 3, 5, 7, 9) ...... (GND – 0.3V) to 15V
Gate Voltages (Pins 12, 14, 16, 18) ........................ 75V
Sense Voltages (Pins 13, 15, 17, 19) ................. V
+
±5V
Current (Any Pin) .................................................. 50mA
Operating Temperature Range
LT1161C ............................................... 0°C to 70°C
LT1161I ............................................ – 40°C to 85°C
Junction Temperature Range (Note 1)
LT1161C .............................................. 0°C to 125°C
LT1161I ......................................... – 40°C to 150°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
PACKAGE/ORDER INFORMATION
TOP VIEW
GND
TIMER1
INPUT 1
TIMER 2
INPUT 2
TIMER 3
INPUT 3
TIMER 4
INPUT 4
1
2
3
4
5
6
7
8
9
20
V
+
ORDER PART
NUMBER
LT1161CN
LT1161CSW
LT1161IN
LT1161ISW
19 SENSE 1
18 GATE 1
17 SENSE 2
16 GATE 2
15 SENSE 3
14 GATE 3
13 SENSE 4
12 GATE 4
11 V
+
SW PACKAGE
20-LEAD PLASTIC SO
GND 10
N PACKAGE
20-LEAD PLASTIC DIP
θ
JA
= 70°C/ W (N)
θ
JA
= 110°C/ W (S)
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The
●
denotes specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
+
= 12V to 48V each channel, unless otherwise noted.
SYMBOL
I
S
∆I
S(ON)
V
INH
V
INL
I
IN
C
IN
V
T(TH)
V
T(CL)
I
T
V
SEN
I
SEN
V
GATE
– V
+
PARAMETER
Supply Current
Delta Supply Current (ON State)
Input High Voltage
Input Low Voltage
Input Current
Input Capacitance
Timer Threshold Voltage
Timer Clamp Voltage
Timer Charge Current
Drain Sense Threshold Voltage
Temperature Coefficient
Drain Sense Input Current
Gate Voltage Above Supply
CONDITIONS
All Channels OFF (Note 2)
Measure Increase in I
S
per Channel
●
●
ELECTRICAL CHARACTERISTICS
MIN
3
2
15
55
2.7
3.2
9
50
TYP
4.5
1
MAX
6.5
1.35
0.8
50
185
3.3
3.8
20
80
1.5
6
10
14
14
400
200
50
V
IN
= 2V
V
IN
= 5V
V
IN
= 2V, Adjust V
T
V
IN
= 0.8V
V
IN
= V
T
= 2V
●
●
●
t
ON
t
OFF
t
OFF(CL)
Turn-ON Time
Turn-OFF Time
Current Limit Turn-OFF Time
V
+
= 48V, V
SEN
= 65mV
V
+
= 8V
V
+
= 12V
V
+
= 24V
V
+
= 48V
V
+
= 24V, V
GATE
> 32V, C
GATE
= 1000pF
V
+
= 24V, V
GATE
< 2V, C
GATE
= 1000pF
V
+
= 24V, (V
+
– V
SENSE
)
→
0.1V, C
GATE
= 1000pF
●
●
●
4
7
10
10
100
30
110
5
3
3.5
14
65
+0.33
0.5
4.5
8.5
12
12
220
75
25
UNITS
mA
mA
V
V
µA
µA
pF
V
V
µA
mV
%/°C
µA
V
V
V
V
µs
µs
µs
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
Both V
+
pins (11, 20) must be connected together and both
ground pins (1, 10) must be connected together.
1161fa
2
U
W
U
U
W W
W
LT1161
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current
20
18
16
16
14
12
T
J
= –40°C
V
GATE
– V
+
10
8
6
4
2
0
0
10
30
20
INPUT VOLTAGE (V)
40
50
1161 G01
GATE DRIVE CURRENT (µA)
SUPPLY CURRENT (mA)
14
12
10
8
6
4
2
0
ALL CHANNELS OFF
ALL CHANNELS ON
T
J
= 25°C
Supply Current
20
18
16
V
+
= 24V
2.4
2.2
DRAIN SENSE THRESHOLD VOLTAGE (mV)
INPUT THRESHOLD VOLTAGE (V)
SUPPLY CURRENT (mA)
14
12
10
8
6
4
2
0
–50
–25
25
50
0
TEMPERATURE (°C)
75
100
1161 G04
ALL CHANNELS ON
ALL CHANNELS OFF
Turn-ON Time Driving MOSFET
500
450
400
TURN-OFF TIME (µs)
TURN-ON TIME (µs)
RESTART PERIOD (ms)
350
300
250
200
150
100
50
0
0
10
30
20
INPUT VOLTAGE (V)
40
50
1161 G07
U W
IRFZ34
MOSFET Gate Voltage Above V
+
100
MOSFET Gate Drive Current
T
J
= 85°C
10
V
+
≥
24V
V
+
= 12V
V
+
= 8V
1
0.1
0
10
30
INPUT VOLTAGE (V)
20
40
50
1161 G02
0
2
4
8
6
10 12 14
GATE VOLTAGE ABOVE V
+
(V)
16
1161 G03
Input Threshold Voltage
V
+
= 24V
110
100
90
80
70
60
50
40
30
20
Drain Sense Threshold Voltage
V
+
= 24V
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
–50
–25
25
50
0
TEMPERATURE (°C)
75
100
1161 G05
TURN-ON
TURN-OFF
10
–50
–25
25
50
0
TEMPERATURE (°C)
75
100
1161 G06
Turn-OFF Time Driving MOSFET
100
90
80
70
60
50
40
30
20
10
0
0
10
30
20
INPUT VOLTAGE (V)
40
50
1161 G08
Automatic Restart Period
1000
V
+
= 24V
C
T
= 3.3µF
IRFZ34
C
T
= 1µF
100
C
T
= 0.33µF
NORMAL
CURRENT LIMIT
C
T
= 0.1µF
10
–50
–25
0
25
50
TEMPERATURE (°C)
75
100
1161 G09
1161fa
3
LT1161
PIN FUNCTIONS
Supply Pins:
The two supply pins are internally connected
and must also be externally connected. In addition to
providing the operating current for the LT1161, the supply
pins also serve as the Kelvin connection for the current
sense comparators. The supply pins must be connected to
the positive side of the drain sense resistors for proper
operation of the current sense.
Input Pins:
The input pins are active high and each pin
activates a separate internal charge pump when switched
ON. The input threshold is TTL/CMOS compatible but may
be taken as high as 15V with or without the supply
powered. Each input has approximately 200mV of hyster-
esis and an internal 75k pull-down resistor.
Gate Pins:
The gate pins drive the power MOSFET gates.
When an input is ON, the corresponding gate pin is
pumped approximately 12V above the supply. These pins
have a relatively high impedance when above the rail (the
equivalent of a few hundred kilohms). Care should be
taken to minimize any loading by parasitic resistance to
ground or supply.
Sense Pins:
Each sense pin connects to the input of a
supply-referenced comparator with a 65mV nominal off-
set. When a sense pin is taken more than 65mV below
supply, the MOSFET gate for that channel is driven low and
the corresponding timing capacitor discharged. Each cur-
rent-sense comparator operates completely independently.
The 65mV typical threshold has a +0.33%/°C temperature
coefficient, which closely matches the TC of drain sense
resistors formed from copper PC traces.
Some loads require high in-rush currents. An RC time
delay can be added between the drain sense resistor and
the sense pin to ensure that the current-sense comparator
does not false trigger during start-up (see Applications
Information). However, a maximum of 10kΩ can be in-
serted between a drain sense resistor and the sense pin. If
current sense is not required in any channel, the sense pin
for that channel is tied to supply.
Timer Pins:
A timing capacitor C
T
from each timer pin to
ground sets the restart time following overcurrent detec-
tion. C
T
is rapidly discharged to less than 1V and then
recharged by a 14µA nominal current source back to the
timer threshold, whereupon restart is attempted. If current
sense is not required in any channel, the timer pin for that
channel is left open.
Ground Pins:
The two ground pins are internally con-
nected and must also be externally connected.
FUNCTIONAL DIAGRA
14µA
TIMER
3V
1.4V
75k
INPUT
75k
4
W
U
U
U
U
U
(Each Channel)
V
+
+
–
+
–
+
–
+
–
1.4V
OSCILLATOR
AND
CHARGE PUMP
65mV
SENSE
GATE
1161 FD
1161fa
LT1161
OPERATIO
The LT1161 gate pin has two states, OFF and ON. In the
OFF state it is held low, while in the ON state it is pumped
to 12V above supply by a self-contained 750kHz charge
pump. The OFF state is activated when either the input pin
is below 1.4V or the timer pin is below 3V. Conversely, for
the ON state to be activated, both the input and timer pins
must be above their thresholds.
If left open, the input pin is held low by a 75k resistor, while
the timer pin is held a diode drop above 3V by a 14µA pull-
up current source. Thus the timer pin automatically re-
verts to the ON state, subject to the input also being high.
The input has approximately 200mV of hysteresis.
The sense pin normally connects to the drain of the power
MOSFET, which returns through a low valued drain sense
resistor to supply. When the gate is ON and the MOSFET
drain current exceeds the level required to generate a
65mV drop across the drain sense resistor, the sense
comparator activates a pull-down NPN which rapidly pulls
the timer pin below 3V. This in turn causes the timer
comparator to override the input pin and activate the gate
pin OFF state, thus protecting the power MOSFET. In order
for the sense comparator to accurately sense MOSFET
drain current, the LT1161 supply pins must be connected
directly to the positive side of the drain sense resistors.
APPLICATIONS INFORMATION
Input/Supply Sequencing
There are no input/supply sequencing requirements for
the LT1161. The input may be taken up to 15V with the
supply at 0V. When the supply is turned on with an input
high, the MOSFET turn-on will be inhibited until the timing
capacitor charges to 3V (i.e., for one restart cycle). The
two V
+
pins (11, 20) must always be connected to each
other.
Isolating the Inputs
51k
Operation in harsh environments may require isolation to
prevent ground transients from damaging control logic.
The LT1161 easily interfaces to low cost opto-isolators.
The network shown in Figure 3 ensures that the input will
be pulled above 2V, but not exceed the absolute maximum
U
W
U
U
U
(Each Channel, Refer to Functional Diagram)
When the MOSFET gate voltage is less than 1.4V, the timer
pin is released. The 14µA current source then slowly
charges the timing capacitor back to 3V where the charge
pump again starts to drive the gate pin high. If a fault still
exists, such as a short circuit, the sense comparator
threshold will again be exceeded and the timer cycle will
repeat until the fault is removed (see Figure 2).
OFF
INPUT
NORMAL
OVERCURRENT
NORMAL
12V
V
+
GATE
0V
3V
TIMER
0V
1161 F02
Figure 2. Timing Diagram
rating, for supply voltages of 12V to 48V over the entire
temperature range. In order to maintain the OFF state, the
opto must have less than 20µA of dark current (leakage)
hot.
12V TO 48V
100k
LOGIC
INPUT
2k
1/4 NEC PS2501-4
IN
LT1161
GND
GND
1161 F03
LOGIC
GND
POWER
GROUND
Figure 3. Isolating the Inputs
1161fa
5
FPGA/CPLD
京公网安备 11010802033920号
EEWORLD
