CS5156
CPU 5−Bit Nonsynchronous
Buck Controller
The CS5156 is a 5−bit nonsynchronous N−Channel buck controller.
It is designed to provide unprecedented transient response for today’s
demanding high−density, high−speed logic. The regulator operates
using a proprietary control method, which allows a 100 ns response
time to load transients. The CS5156 is designed to operate over a
4.25−16 V range (V
CC
) using 12 V to power the IC and 5.0 V as the
main supply for conversion.
The CS5156 is specifically designed to power Pentium® II
processors and other high performance core logic. It includes the
following features: on board, 5−bit DAC, short circuit protection,
1.0% output tolerance, V
CC
monitor, and programmable Soft Start
capability. The CS5156 is backwards compatible with the 4−bit
CS5151, allowing the mother board designer the capability of using
either the CS5151 or the CS5156 with no change in layout. The
CS5156 is available in 16 pin surface mount and DIP packages.
Features
•
N−Channel Design
•
Excess of 1.0 MHz Operation
•
100 ns Transient Response
•
5−Bit DAC
•
Backward Compatible with 4−Bit CS5150/CS5151
•
30 ns Gate Rise/Fall Times
•
1.0% DAC Accuracy
•
5.0 V & 12 V Operation
•
Remote Sense
•
Programmable Soft Start
•
Lossless Short Circuit Protection
•
V
CC
Monitor
•
Adaptive Voltage Positioning
•
V
2
™
Control Topology
•
Current Sharing
•
Overvoltage Protection
16
1
DIP−16
N SUFFIX
CASE 648
A
WL, L
YY, Y
WW, W
1
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MARKING
DIAGRAMS
16
16
CS5156
AWLYWW
1
1
SOIC−16
D SUFFIX
CASE 751B
16
CS5156
AWLYYWW
= Assembly Location
= Wafer Lot
= Year
= Work Week
PIN CONNECTIONS
V
ID0
V
ID1
V
ID2
V
ID3
SS
V
ID4
C
OFF
V
FFB
1
V
FB
COMP
LGND
V
CC1
NC
PGND
V
GATE
V
CC2
ORDERING INFORMATION
Device
CS5156GD16
CS5156GDR16
CS5156GN16
Package
SO−16
SO−16
DIP−16
Shipping
48 Units/Rail
2500 Tape & Reel
25 Units/Rail
©
Semiconductor Components Industries, LLC, 2006
July, 2006
−
Rev. 11
1
Publication Order Number:
CS5156/D
CS5156
12 V
5.0 V
0.1
μF
V
CC1
V
ID0
V
ID1
V
ID2
V
ID3
V
ID4
330 pF
V
ID0
V
ID1
V
ID2
V
ID3
V
ID4
C
OFF
SS
COMP
LGND
MBR1535CT
2
1,3
V
CC2
IRL3103
2.0
μH
1200
μF/16
V
×
3
AIEI
V
GATE
1.3 V to 3.5 V @ 13 A
CS5156
PGND
0.1
μF
V
FB
3.3 k
V
FFB
100 pF
0.33
μF
1200
μF/16
V
×
5
AIEI
Figure 1. Application Diagram, Switching Power Supply for Core Logic
−
Pentium
)
II Processor
ABSOLUTE MAXIMUM RATINGS*
Rating
Operating Junction Temperature, T
J
Lead Temperature Soldering:
Storage Temperature Range, T
S
ESD Susceptibility (Human Body Model)
1. 10 second maximum.
2. 60 second maximum above 183°C.
*The maximum package power dissipation must be observed.
Wave Solder (through hole styles only) (Note 1)
Reflow: (SMD styles only) (Note 2)
Value
0 to 150
260 peak
230 peak
−65
to +150
2.0
Unit
°C
°C
°C
kV
ABSOLUTE MAXIMUM RATINGS
Pin Name
V
CC1
V
CC2
SS
COMP
V
FB
C
OFF
V
FFB
V
ID0
−
V
ID4
V
GATE
LGND
PGND
Max Operating Voltage
16 V/−0.3 V
16 V/−0.3 V
6.0 V/−0.3 V
6.0 V/−0.3 V
6.0 V/−0.3 V
6.0 V/−0.3 V
6.0 V/−0.3 V
6.0 V/−0.3 V
16 V/−0.3 V
0V
0V
Max Current
25 mA DC/1.5 A peak
20 mA DC/1.5 A peak
−100
μA
200
μA
−0.2
μA
−0.2
μA
−0.2
μA
−50
μA
100 mA DC/1.5 A peak
25 mA
100 mA DC/1.5 A peak
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2
CS5156
ELECTRICAL CHARACTERISTICS
(0°C < T
A
< +70°C; 0°C < T
J
< +85°C; 8.0 V < V
CC1
< 14 V; 5.0 V < V
CC2
< 14 V;
DAC Code: V
ID4
= V
ID2
= V
ID1
= V
ID0
= 1; V
ID3
= 0
;
CV
GATE
= 1.0 nF; C
OFF
= 330 pF; C
SS
= 0.1
μF,
unless otherwise specified.)
Characteristic
Error Amplifier
V
FB
Bias Current
Open Loop Gain
Unity Gain Bandwidth
COMP SINK Current
COMP SOURCE Current
COMP CLAMP Current
COMP High Voltage
COMP Low Voltage
PSRR
V
CC1
Monitor
Start Threshold
Stop Threshold
Hysteresis
V
GATE
Out SOURCE Sat at 100 mA
Out SINK Sat at 100 mA
Out Rise Time
Out Fall Time
Shoot−Through Current
V
GATE
Resistance
V
GATE
Schottky
Soft Start (SS)
Charge Time
Pulse Period
Duty Cycle
COMP Clamp Voltage
V
FFB
SS Fault Disable
High Threshold
PWM Comparator
Transient Response
V
FFB
Bias Current
V
FFB
= 0 to 5.0 V to V
GATE
= 9.0 V to 1.0 V;
V
CC1
= V
CC2
= 12 V
V
FFB
= 0 V
−
−
100
0.3
125
−
ns
μA
−
−
(Charge Time /Pulse Period)
×
100
V
FB
= 0 V; V
SS
= 0
V
GATE
= Low
−
1.6
25
1.0
0.50
0.9
−
3.3
100
3.3
0.95
1.0
2.5
5.0
200
6.0
1.10
1.1
3.0
ms
ms
%
V
V
V
Measure V
CC2
−
V
GATE
Measure V
GATE
−
V
PGND
1.0 V < V
GATE
< 9.0 V; V
CC1
= V
CC2
= 12 V
9.0 V > V
GATE
> 1.0 V; V
CC1
= V
CC2
= 12 V
Note 3
Resistor to LGND.
LGND to V
GATE
@ 10 mA
−
−
−
−
−
20
−
1.2
1.0
30
30
−
50
600
2.0
1.5
50
50
50
100
800
V
V
ns
ns
mA
kΩ
mV
Output switching
Output not switching
Start−Stop
3.75
3.70
−
3.90
3.85
50
4.05
4.00
−
V
V
mV
V
FB
= 0 V
1.25 V < V
COMP
< 4.0 V; Note 3
Note 3
V
COMP
= 1.5 V; V
FB
= 3.0 V; V
SS
> 2.0 V
V
COMP
= 1.2 V; V
FB
= 2.7 V; V
SS
= 5.0 V
V
COMP
= 0 V; V
FB
= 2.7 V
V
FB
= 2.7 V; V
SS
= 5.0 V
V
FB
= 3.0 V
8.0 V < V
CC1
< 14 V @ 1.0 kHz; Note 3
−
50
500
0.4
30
0.4
4.0
−
60
0.3
60
3000
2.5
50
1.0
4.3
160
85
1.0
−
−
8.0
70
1.6
5.0
600
−
μA
dB
kHz
mA
μA
mA
V
mV
dB
Test Conditions
Min
Typ
Max
Unit
3. Guaranteed by design, not 100% tested in production.
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CS5156
ELECTRICAL CHARACTERISTICS (continued)
(0°C < T
A
< +70°C; 0°C < T
J
< +85°C; 8.0 V < V
CC1
< 14 V; 5.0 V < V
CC2
< 14 V;
DAC Code: V
ID4
= V
ID2
= V
ID1
= V
ID0
= 1; V
ID3
= 0
;
CV
GATE
= 1.0 nF; C
OFF
= 330 pF; C
SS
= 0.1
μF,
unless otherwise specified.)
Characteristic
DAC
Input Threshold
Input Pull Up Resistance
Pull Up Voltage
Accuracy
V
ID4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
V
ID3
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
V
ID2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
V
ID1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
V
ID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
1.3266
1.3761
1.4256
1.4751
1.5246
1.5741
1.6236
1.6731
1.7226
1.7721
1.8216
1.8711
1.9206
1.9701
2.0196
2.0691
1.2315
2.1186
2.2176
2.3166
2.4156
2.5146
2.6136
2.7126
2.8116
2.9106
3.0096
3.1086
3.2076
3.3066
3.4056
3.5046
1.3400
1.3900
1.4400
1.4900
1.5400
1.5900
1.6400
1.6900
1.7400
1.7900
1.8400
1.8900
1.9400
1.9900
2.0400
2.0900
1.2440
2.1400
2.2400
2.3400
2.4400
2.5400
2.6400
2.7400
2.8400
2.9400
3.0400
3.1400
3.2400
3.3400
3.4400
3.5400
1.3534
1.4039
1.4544
1.5049
1.5554
1.6059
1.6564
1.7069
1.7574
1.8079
1.8584
1.9089
1.9594
2.0099
2.0604
2.1109
1.2564
2.1614
2.2624
2.3634
2.4644
2.5654
2.6664
2.7674
2.8684
2.9694
3.0704
3.1714
3.2724
3.3734
3.4744
3.5754
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
ID0,
V
ID1
, V
ID2
, V
ID3
, V
ID4
V
ID0,
V
ID1
, V
ID2
, V
ID3
, V
ID4
−
Measure V
FB
= COMP, 25°C
≤
T
J
≤
85°C
1.00
25
4.85
−
1.25
50
5.00
−
2.40
100
5.15
1.0
V
kΩ
V
%
Test Conditions
Min
Typ
Max
Unit
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CS5156
ELECTRICAL CHARACTERISTICS (continued)
(0°C < T
A
< +70°C; 0°C < T
J
< +85°C; 8.0 V < V
CC1
< 14 V; 5.0 V < V
CC2
< 14 V;
DAC Code: V
ID4
= V
ID2
= V
ID1
= V
ID0
= 1; V
ID3
= 0
;
CV
GATE
= 1.0 nF; C
OFF
= 330 pF; C
SS
= 0.1
μF,
unless otherwise specified.)
Characteristic
Supply Current
I
CC1
I
CC2
Operating I
CC1
Operating I
CC2
C
OFF
Normal Charge Time
Extension Charge Time
Discharge Current
Time Out Timer
Time Out Time
Fault Mode Duty Cycle
V
FB
= V
COMP
; V
FFB
= 2.0 V;
Record V
GATE
Pulse High Duration
V
FFB
= 0V
10
35
30
50
50
65
μs
%
V
FFB
= 1.5 V; V
SS
= 5.0 V
V
SS
= V
FFB
= 0
C
OFF
to 5.0 V; V
FB
> 1.0 V
1.0
5.0
5.0
1.6
8.0
−
2.2
11.0
−
μs
μs
mA
No Switching
No Switching
V
FB
= COMP = V
FFB
V
FB
= COMP = V
FFB
−
−
−
−
8.5
1.6
8.0
2.0
13.5
3.0
13
5.0
mA
mA
mA
mA
Test Conditions
Min
Typ
Max
Unit
PACKAGE PIN DESCRIPTION
PACKAGE PIN #
SO−16, DIP−16
1, 2, 3, 4, 6
PIN SYMBOL
V
ID0
−V
ID4
FUNCTION
Voltage ID DAC input pins. These pins are internally pulled up to 5.0 V providing
logic ones if left open. V
ID4
selects the DAC range. When V
ID4
is High (logic
one), the DAC range is 2.14 V to 3.54 V with 100 mV increments. When V
ID4
is
Low (logic zero), the DAC range is 1.34 V to 2.09 V with 50 mV increments. V
ID0
−
V
ID4
select the desired DAC output voltage. Leaving all 5 DAC input pins open
results in a DAC output voltage of 1.244 V, allowing for adjustable output volt-
age, using a traditional resistor divider.
Soft Start Pin. A capacitor from this pin to LGND in conjunction with internal 60
μA
current source provides Soft Start function for the controller. This pin disables fault
detect function during Soft Start. When a fault is detected, the Soft Start capacitor
is slowly discharged by internal 2.0
μA
current source setting the time out before
trying to restart the IC. Charge/discharge current ratio of 30 sets the duty cycle for
the IC when the regulator output is shorted.
A capacitor from this pin to ground sets the time duration for the on board one
shot, which is used for the constant off time architecture.
Fast feedback connection to the PWM comparator. This pin is connected to the
regulator output. The inner feedback loop terminates on time.
Boosted power for the gate driver.
MOSFET driver pin capable of 1.5 A peak switching current.
High current ground for the IC. The MOSFET driver is referenced to this pin. Input
capacitor ground and the anode of the Schottky diode should be tied to this pin.
No connection.
Input power for the IC.
Signal ground for the IC. All control circuits are referenced to this pin.
Error amplifier compensation pin. A capacitor to ground should be provided exter-
nally to compensate the amplifier.
Error amplifier DC feedback input. This is the master voltage feedback which sets
the output voltage. This pin can be connected directly to the output or a remote
sense trace.
5
SS
7
8
9
10
11
12
13
14
15
16
C
OFF
V
FFB
V
CC2
V
GATE
PGND
NC
V
CC1
LGND
COMP
V
FB
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