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TH50VSF2582

Description
SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE
File Size513KB,50 Pages
ManufacturerToshiba Semiconductor
Websitehttp://toshiba-semicon-storage.com/
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TH50VSF2582 Overview

SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE

TH50VSF2582/2583AASB
TENTATIVE
TOSHIBA MULTI-CHIP INTEGRATED CIRCUIT SILICON GATE CMOS
SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE
DESCRIPTION
The TH50VSF2582/2583AASB is a mixed multi-chip package containing a 4,194,304-bit full CMOS SRAM and a
33,554,432-bit flash memory. The CIOS and CIOF inputs can be used to select the optimal memory configuration.
The power supply for the TH50VSF2582/2583AASB can range from 2.7 V to 3.6 V. The TH50VSF2582/2583AASB
can perform simultaneous read/write operations on its flash memory and is available in a 69-pin BGA package,
making it suitable for a variety of applications.
FEATURES
Power supply voltage
V
CCs
=
2.7 V~3.6 V
V
CCf
=
2.7 V~3.6 V
Data retention supply voltage
V
CCs
=
1.5 V~3.6 V
Current consumption
Operating: 45 mA maximum (CMOS level)
Standby: 7
µA
maximum (SRAM CMOS level)
Standby: 10
µA
maximum (flash CMOS level)
Block erase architecture for flash memory
8 blocks of 8 Kbytes
63 blocks of 64 Kbytes
Organization
CIOF
V
CC
V
CC
V
SS
CIOS
V
CC
V
SS
V
SS
Flash Memory
2,097,152 words of 16 bits
2,097,152 words of 16 bits
4,194,304 words of 8 bits
SRAM
262,144 words of 16 bits
524,288 words of 8 bits
524,288 words of 8 bits
Function mode control for flash memory
Compatible with JEDEC-standard commands
Flash memory functions
Simultaneous Read/Write operations
Auto-Program
Auto Chip Erase, Auto Block Erase
Auto Multiple-Block Erase
Program Suspend/Resume
Block-Erase Suspend/Resume
Data Polling / Toggle Bit function
Block Protection / Boot Block Protection
Support for automatic sleep and hidden ROM area
Common flash memory interface (CFI)
Byte/Word Modes
Erase and Program cycles for flash memory
10
5
cycles (typical)
Boot block architecture for flash memory
TH50VSF2582AASB: Top boot block
TH50VSF2583AASB: Bottom boot block
Package
P-FBGA69-1209-0.80A3: 0.31 g (typ.)
PIN ASSIGNMENT
(TOP VIEW)
CIOF
=
V
CC
, CIOS
=
V
CC
(×16,
×16)
1
2
3
4
5
6
7
8
9
10
PIN NAMES
A0~A21
A12S
A12F
SA
DQ0~DQ15
Address inputs
A12 input for SRAM
A12 input for flash memory
A18 input for SRAM
Data inputs/outputs
Chip Enable input for flash memory
Output Enable input
Write Enable input
Data byte control input
Ready/Busy output
Hardware reset input
Write Protect / Program Acceleration input
Word Enable input for SRAM
Word Enable input for flash memory
Power supply for SRAM
Power supply for flash memory
Ground
Not connected
Do not use
000707EBA2
A
B
C
D
E
F
G
H
J
K
L
M
NC
NC
NC
A3
A2
NC
NC
A1
A0
CEF
CE1S
A7
A6
A5
A4
V
SS
OE
DQ0
DQ8
NC
NC
NC
NC
CE1S , CE2S Chip Enable inputs for SRAM
CEF
OE
LB
UB
A18
A17
DQ1
DQ9
DQ10
DQ2
WP/ACC
RESET
WE
CE2S
A20
A8
A19
A9
A10
DQ6
A11
A12
A13
A14
DU
A15
NC
NC
A16
NC
NC
WE
LB
, UB
RY/BY
RESET
WP/ACC
CIOS
CIOF
V
CCs
V
CCf
NC
NC
V
SS
NC
DU
RY/BY
DQ3
V
CCf
DQ11
DQ4
DQ13 DQ15 CIOF
DQ7
DQ14
V
SS
V
CCs
DQ12
CIOS
DQ5
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the
buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and
to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or
damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the
most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling
Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy
control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document
shall be made at the customer’s own risk.
2001-10-25
1/50

TH50VSF2582 Related Products

TH50VSF2582 TH50VSF2582AASB TH50VSF2583AASB
Description SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE SRAM AND FLASH MEMORY MIXED MULTI-CHIP PACKAGE
Maker - Toshiba Semiconductor Toshiba Semiconductor
Parts packaging code - BGA BGA
package instruction - LFBGA, BGA69,10X12,32 LFBGA, BGA69,10X12,32
Contacts - 69 69
Reach Compliance Code - unknow unknow
Maximum access time - 70 ns 70 ns
Other features - USER CONFIGURABLE AS 4M X 8 FLASH AND CONTAINS SRAM CONFIGURED AS 256K X 16 OR 512K X 8 USER CONFIGURABLE AS 4M X 8 FLASH AND CONTAINS SRAM CONFIGURED AS 256K X 16 OR 512K X 8
JESD-30 code - R-PBGA-B69 R-PBGA-B69
JESD-609 code - e0 e0
length - 12 mm 12 mm
memory density - 33554432 bi 33554432 bi
Memory IC Type - MEMORY CIRCUIT MEMORY CIRCUIT
memory width - 16 16
Mixed memory types - FLASH+SRAM FLASH+SRAM
Number of functions - 1 1
Number of terminals - 69 69
word count - 2097152 words 2097152 words
character code - 2000000 2000000
Operating mode - ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature - 85 °C 85 °C
Minimum operating temperature - -40 °C -40 °C
organize - 2MX16 2MX16
Package body material - PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - LFBGA LFBGA
Encapsulate equivalent code - BGA69,10X12,32 BGA69,10X12,32
Package shape - RECTANGULAR RECTANGULAR
Package form - GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH
power supply - 3/3.3 V 3/3.3 V
Certification status - Not Qualified Not Qualified
Maximum seat height - 1.4 mm 1.4 mm
Maximum slew rate - 0.05 mA 0.05 mA
Maximum supply voltage (Vsup) - 3.6 V 3.6 V
Minimum supply voltage (Vsup) - 2.7 V 2.7 V
Nominal supply voltage (Vsup) - 3 V 3 V
surface mount - YES YES
technology - CMOS CMOS
Temperature level - INDUSTRIAL INDUSTRIAL
Terminal surface - TIN LEAD TIN LEAD
Terminal form - BALL BALL
Terminal pitch - 0.8 mm 0.8 mm
Terminal location - BOTTOM BOTTOM
width - 9 mm 9 mm
Base Number Matches - 1 1
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